Patents by Inventor Danny Retuta

Danny Retuta has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9842792
    Abstract: A method of manufacturing a lead frame includes providing an electrically conductive layer having a plurality of holes at a top surface. The plurality of holes form a structure of leads and a die pad on the electrically conductive layer. The plurality of holes are filled with a non-conductive material. Next; an electrically conductive foil is attached on the top surface of the electrically conductive layer and the non-conductive epoxy material. The, the electrically conductive foil is etched to create a network of leads, die pad, bus lines, dam bars and tie lines, wherein the bus lines connect the leads to the dam bar, the dam bar is connected to the tie line and the tie line is connected to the die pad.
    Type: Grant
    Filed: January 27, 2016
    Date of Patent: December 12, 2017
    Assignee: UTAC HEADQUARTERS PTE. LTD.
    Inventors: Danny Retuta, Hien Boon Tan, Anthony Yi Sheng Sun, Mary Annie Cheong
  • Publication number: 20160211196
    Abstract: A method of manufacturing a lead frame includes providing an electrically conductive layer having a plurality of holes at a top surface. The plurality of holes form a structure of leads and a die pad on the electrically conductive layer. The plurality of holes are filled with a non-conductive material. Next; an electrically conductive foil is attached on the top surface of the electrically conductive layer and the non-conductive epoxy material. The, the electrically conductive foil is etched to create a network of leads, die pad, bus lines, dam bars and tie lines, wherein the bus lines connect the leads to the dam bar, the dam bar is connected to the tie line and the tie line is connected to the die pad.
    Type: Application
    Filed: January 27, 2016
    Publication date: July 21, 2016
    Applicant: UNITED TEST AND ASSEMBLY CENTER LTD.
    Inventors: Danny RETUTA, Hien Boon TAN, Anthony Yi Sheng SUN, Mary Annie CHEONG
  • Patent number: 9281218
    Abstract: A method of manufacturing a lead frame includes providing an electrically conductive layer having a plurality of holes at a top surface. The plurality of holes form a structure of leads and a die pad on the electrically conductive layer. The plurality of holes are filled with a non-conductive material. Next; an electrically conductive foil is attached on the top surface of the electrically conductive layer and the non-conductive epoxy material. Then, the electrically conductive foil is etched to create a network of leads, die pad, bus lines, dam bars and tie lines, wherein the bus lines connect the leads to the dam bar, the dam bar is connected to the tie line and the tie line is connected to the die pad.
    Type: Grant
    Filed: August 29, 2007
    Date of Patent: March 8, 2016
    Assignee: UNITED TEST AND ASSEMBLY CENTER LTD.
    Inventors: Danny Retuta, Hien Boon Tan, Anthony Yi Sheng Sun, Mary Annie Cheong
  • Patent number: 8030768
    Abstract: A semiconductor package with a semiconductor chip having under bump metallizations (UBMs) on a first surface and a substrate having open vias. The substrate is attached to the semiconductor chip with the UBMs in alignment with the open vias. An encapsulant surrounds the semiconductor chip and the substrate and a conductor fills the open vias to form external package connections.
    Type: Grant
    Filed: April 24, 2008
    Date of Patent: October 4, 2011
    Assignee: United Test And Assembly Center Ltd.
    Inventors: Roel Robles, Danny Retuta, Mary Annie Cheong, Hien Boon Tan, Anthony Yi Sheng Sun, Richard Gan
  • Publication number: 20090236726
    Abstract: A semiconductor package that includes a substrate having first and second major surfaces is presented. The package includes a plurality of landing pads and a semiconductor die disposed on the first major surface. A molded cap is disposed on the first surface to encapsulate the die and substrate. The landing pads are covered when the cap is molded. Package interconnects are coupled to the landing pads. The package interconnects are exposed by the cap to facilitate package stacking.
    Type: Application
    Filed: December 12, 2008
    Publication date: September 24, 2009
    Applicant: UNITED TEST AND ASSEMBLY CENTER LTD.
    Inventors: Danny RETUTA, Hien Boon TAN, Yi Sheng Anthony SUN, Librado Amurao GATBONTON, Antonio DIMAANO, JR.
  • Publication number: 20080284015
    Abstract: A semiconductor package with a semiconductor chip having under bump metallizations (UBMs) on a first surface and a substrate having open vias. The substrate is attached to the semiconductor chip with the UBMs in alignment with the open vias. An encapsulant surrounds the semiconductor chip and the substrate and a conductor fills the open vias to form external package connections. A method of forming a semiconductor package having external package connections includes providing a semiconductor chip having under bump metallizations (UBMs) on a first surface; attaching the first surface of the semiconductor chip to a substrate, the UBMs of the semiconductor chip being in alignment with open vias formed in the substrate; encapsulating the semiconductor chip and the substrate; and filling with open vias with a conductor to form the external package connections.
    Type: Application
    Filed: April 24, 2008
    Publication date: November 20, 2008
    Inventors: Roel Robles, Danny Retuta, Mary Annie Cheong, Hien Boon Tan, Anthony Yi Sheng Sun, Richard Gan
  • Publication number: 20080061414
    Abstract: A method of manufacturing a lead frame includes providing an electrically conductive layer having a plurality of holes at a top surface. The plurality of holes form a structure of leads and a die pad on the electrically conductive layer. The plurality of holes are filled with a non-conductive material. Next; an electrically conductive foil is attached on the top surface of the electrically conductive layer and the non-conductive epoxy material. Then, the electrically conductive foil is etched to create a network of leads, die pad, bus lines, dam bars and tie lines, wherein the bus lines connect the leads to the dam bar, the dam bar is connected to the tie line and the tie line is connected to the die pad.
    Type: Application
    Filed: August 29, 2007
    Publication date: March 13, 2008
    Applicant: United Test and Assembly Center Ltd.
    Inventors: Danny RETUTA, Hien Boon Tan, Anthony Sun, Mary Annie Cheong
  • Publication number: 20070246810
    Abstract: A semiconductor package includes a plurality of first leads, each with a top outer portion removed from the lead and an outer end, and a plurality of second leads, each with a bottom outer portion removed from the lead and an outer end. The first and second leads alternate with each other along an edge of the package. Also, the outer ends of the first leads form a first row along the edge of the package and the outer ends of the second leads form a second row along the edge of the package. In one embodiment, the first and second rows are parallel to each other and an encapsulant covers at least a portion of the first and second leads.
    Type: Application
    Filed: April 19, 2006
    Publication date: October 25, 2007
    Inventors: Danny Retuta, Hien Tan, Susanto Tanary, Anthony Sun, Soon Tan