Patents by Inventor Danny Y. Zhou

Danny Y. Zhou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11805116
    Abstract: Technologies for securing a virtualization network function (VNF) image includes a security server to generate a wrapping cryptographic key to wrap a private key of the VNF image and replace the private key with the wrapped private key to secure the private key. During operation, the VNF image may be authenticated by a network function virtualization (NFV) server as needed. Additionally, the signature of the VNF image may be updated each time the VNF image is shutdown to ensure the continued authenticity of the VNF image.
    Type: Grant
    Filed: March 31, 2018
    Date of Patent: October 31, 2023
    Assignee: Intel Corporation
    Inventors: Changzheng Wei, Weigang Li, Danny Y. Zhou, Junyuan Wang, Hari K. Tadepalli, Rashmin N. Patel
  • Publication number: 20230239368
    Abstract: Devices and techniques for accelerated packet processing are described herein. The device can match an action to a portion of a network data packet and accelerate the packet-processing pipeline for the network data packet through the machine by processing the action.
    Type: Application
    Filed: April 4, 2023
    Publication date: July 27, 2023
    Applicant: Intel Corporation
    Inventors: Daniel Daly, John Fastabend, Matthew Vick, Brian J. Skerry, Marco Varlese, Jing Mark Chen, Danny Y. Zhou
  • Patent number: 11677851
    Abstract: Devices and techniques for accelerated packet processing are described herein. The device can match an action to a portion of a network data packet and accelerate the packet-processing pipeline for the network data packet through the machine by processing the action.
    Type: Grant
    Filed: September 24, 2021
    Date of Patent: June 13, 2023
    Assignee: Intel Corporation
    Inventors: Daniel Daly, John Fastabend, Matthew Vick, Brian J. Skerry, Marco Varlese, Jing Mark Chen, Danny Y. Zhou
  • Publication number: 20220060555
    Abstract: Devices and techniques for accelerated packet processing are described herein. The device can match an action to a portion of a network data packet and accelerate the packet-processing pipeline for the network data packet through the machine by processing the action.
    Type: Application
    Filed: September 24, 2021
    Publication date: February 24, 2022
    Applicant: Intel Corporation
    Inventors: Daniel Daly, John Fastabend, Matthew Vick, Brian J. Skerry, Marco Varlese, Jing Mark Chen, Danny Y. Zhou
  • Patent number: 11134132
    Abstract: Devices and techniques for accelerated packet processing are described herein. The device can match an action to a portion of a network data packet and accelerate the packet-processing pipeline for the network data packet through the machine by processing the action.
    Type: Grant
    Filed: July 2, 2019
    Date of Patent: September 28, 2021
    Assignee: Intel Corporation
    Inventors: Daniel Daly, John Fastabend, Matthew Vick, Brian J. Skerry, Marco Varlese, Jing Mark Chen, Danny Y. Zhou
  • Patent number: 10853277
    Abstract: Disclosed herein are systems and methods for isolating input/output computing resources. In some embodiments, a host device may include logic to identify a Process Address Space Identifier (PASID) for a process or container of the host device and logic to associate the PASID with an individual queue pair of a hardware device of the host device, wherein the queue pair includes two complementary queues and wherein the queue pair is owned by the process or container upon association with the PASID. Other embodiments may be disclosed and/or claimed.
    Type: Grant
    Filed: June 24, 2015
    Date of Patent: December 1, 2020
    Assignee: Intel Corporation
    Inventors: Cunming Liang, Danny Y. Zhou, David E. Cohen, James R. Harris
  • Publication number: 20190327323
    Abstract: Devices and techniques for accelerated packet processing are described herein. The device can match an action to a portion of a network data packet and accelerate the packet-processing pipeline for the network data packet through the machine by processing the action.
    Type: Application
    Filed: July 2, 2019
    Publication date: October 24, 2019
    Applicant: Intel Corporation
    Inventors: Daniel Daly, John Fastabend, Matthew Vick, Brian J. Skerry, Marco Varlese, Jing Mark Chen, Danny Y. Zhou
  • Patent number: 10432745
    Abstract: Devices and techniques for accelerated packet processing are described herein. The device can match an action to a portion of a network data packet and accelerate the packet-processing pipeline for the network data packet through the machine by processing the action.
    Type: Grant
    Filed: January 24, 2018
    Date of Patent: October 1, 2019
    Assignee: Intel Corporation
    Inventors: Daniel Daly, John R. Fastabend, Matthew Vick, Brian J. Skerry, Marco Varlese, Jing Mark Chen, Danny Y. Zhou
  • Publication number: 20180234516
    Abstract: Devices and techniques for accelerated packet processing are described herein. The device can match an action to a portion of a network data packet and accelerate the packet-processing pipeline for the network data packet through the machine by processing the action.
    Type: Application
    Filed: January 24, 2018
    Publication date: August 16, 2018
    Inventors: Daniel Daly, John R. Fastabend, Matthew Vick, Brian J. Skerry, Marco Varlese, Jing Mark Chen, Danny Y. Zhou
  • Publication number: 20180129616
    Abstract: Disclosed herein are systems and methods for isolating input/output computing resources. In some embodiments, a host device may include logic to identify a Process Address Space Identifier (PASID) for a process or container of the host device and logic to associate the PASID with an individual queue pair of a hardware device of the host device, wherein the queue pair includes two complementary queues and wherein the queue pair is owned by the process or container upon association with the PASID. Other embodiments may be disclosed and/or claimed.
    Type: Application
    Filed: June 24, 2015
    Publication date: May 10, 2018
    Inventors: Cunming LIANG, Danny Y. ZHOU, David E. COHEN, James R. HARRIS
  • Patent number: 9912774
    Abstract: Devices and techniques for accelerated packet processing are described herein. The device can match an action to a portion of a network data packet and accelerate the packet-processing pipeline for the network data packet through the machine by processing the action.
    Type: Grant
    Filed: December 22, 2015
    Date of Patent: March 6, 2018
    Assignee: Intel Corporation
    Inventors: Daniel Daly, John Fastabend, Matthew Vick, Brian J. Skerry, Marco Varlese, Jing Mark Chen, Danny Y. Zhou
  • Publication number: 20170180273
    Abstract: Devices and techniques for accelerated packet processing are described herein. The device can match an action to a portion of a network data packet and accelerate the packet-processing pipeline for the network data packet through the machine by processing the action.
    Type: Application
    Filed: December 22, 2015
    Publication date: June 22, 2017
    Inventors: Daniel Daly, John Fastabend, Matthew Vick, Brian J. Skerry, Marco Varlese, Jing Mark Chen, Danny Y. Zhou