Patents by Inventor Danyal Shamsi

Danyal Shamsi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • INTEGRATED CIRCUIT DESIGN VERIFICATION
    Publication number: 20240330549
    Abstract: In described examples, a method of testing an integrated circuit design under verification (DUV) includes selecting first and second stimulus-response data to generate a model, and adjusting model training data in response to model accuracy. The first stimulus-response data is selected from stimulus-response data for a known-good design similar to the DUV. The second stimulus-response data is selected from stimulus-response data for the DUV. The model is trained using the first and second stimulus-response data. A first correlation measure verifies model accuracy with respect to trained DUV stimulus-response data. A second correlation measure verifies model accuracy with respect to untrained DUV stimulus-response data.
    Type: Application
    Filed: March 28, 2023
    Publication date: October 3, 2024
    Inventors: Danyal Shamsi, Venkata Naresh Kotikelapudi, Venkateswaran Padmanabhan, Guha Lakshmanan, Saksham Sangwan