Patents by Inventor Daoud Salameh
Daoud Salameh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240030876Abstract: Circuits and methods for achieving good amplifier AM-AM and AM-PM metrics while achieving good power, PAE, linearity, and EVM performance. Embodiments compensate for a non-linear distortion profile (e.g., an AM-PM and/or AM-AM profile) in an amplifier by pre-processing an input signal, such as a radio-frequency signal, to alter the non-linear distortion profile of the input signal so as to compensate for the non-linear distortion profile imposed by a coupled device, such as an amplifier.Type: ApplicationFiled: July 28, 2023Publication date: January 25, 2024Inventor: Daoud Salameh
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Patent number: 11817827Abstract: Circuits and methods for achieving good AM-AM and AM-PM metrics while achieving good power, PAE, linearity, and EVM performance in an amplifier. Embodiments provide an equalization approach which compensates for AM-AM and AM-PM variations in an amplifier by controlling bias voltage versus output power to alter the AM-AM and AM-PM profiles imposed by the amplifier. Differential amplifier embodiments include cross-coupled common-gate transistors that generate an equalization voltage that alters the gate bias voltage of respective main FETs in proportion to a power level present at the respective drains of the main FETs. Single-ended amplifier embodiments include an equalization circuit that alters the bias voltage to the gate of a main FET in proportion to a power level present at the main FET drain. Embodiments may also include a linearization circuit which alters the AM-PM profile of an input signal to compensate for the AM-PM profile imposed by a coupled amplifier.Type: GrantFiled: February 2, 2021Date of Patent: November 14, 2023Inventor: Daoud Salameh
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Patent number: 11606068Abstract: Circuits and methods for achieving good amplifier AM-AM and AM-PM metrics while achieving good power, PAE, linearity, and EVM performance. Embodiments compensate for a non-linear distortion profile (e.g., an AM-PM and/or AM-AM profile) in an amplifier by pre-processing an input signal, such as a radio-frequency signal, to alter the non-linear distortion profile of the input signal so as to compensate for the non-linear distortion profile imposed by a coupled device, such as an amplifier.Type: GrantFiled: February 2, 2021Date of Patent: March 14, 2023Assignee: pSemi CorporationInventor: Daoud Salameh
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Publication number: 20220247358Abstract: Circuits and methods for achieving good AM-AM and AM-PM metrics while achieving good power, PAE, linearity, and EVM performance in an amplifier. Embodiments provide an equalization approach which compensates for AM-AM and AM-PM variations in an amplifier by controlling bias voltage versus output power to alter the AM-AM and AM-PM profiles imposed by the amplifier. Differential amplifier embodiments include cross-coupled common-gate transistors that generate an equalization voltage that alters the gate bias voltage of respective main FETs in proportion to a power level present at the respective drains of the main FETs. Single-ended amplifier embodiments include an equalization circuit that alters the bias voltage to the gate of a main FET in proportion to a power level present at the main FET drain. Embodiments may also include a linearization circuit which alters the AM-PM profile of an input signal to compensate for the AM-PM profile imposed by a coupled amplifier.Type: ApplicationFiled: February 2, 2021Publication date: August 4, 2022Inventor: Daoud Salameh
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Publication number: 20220247361Abstract: Circuits and methods for achieving good amplifier AM-AM and AM-PM metrics while achieving good power, PAE, linearity, and EVM performance. Embodiments compensate for a non-linear distortion profile (e.g., an AM-PM and/or AM-AM profile) in an amplifier by pre-processing an input signal, such as a radio-frequency signal, to alter the non-linear distortion profile of the input signal so as to compensate for the non-linear distortion profile imposed by a coupled device, such as an amplifier.Type: ApplicationFiled: February 2, 2021Publication date: August 4, 2022Inventor: Daoud Salameh
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Publication number: 20210203374Abstract: A hybrid coupler-based T/R switch for use in a TDM system. An output hybrid coupler of a balanced amplifier is used to selectively switch a transmit or receive path to an antenna. During transmission, power at the output of the balanced amplifier is delivered directly to the antenna. During reception, power from the antenna is reflected through ports of the hybrid coupler connected to respective two amplifiers of the balanced amplifier, to constructively combine at a port of the coupler coupled to the receive path, with a ninety degrees phase shift. A pair of shunting switches or series switches coupled to the ports of the hybrid coupler connected to the two amplifiers, and a shunting switch coupled to the port coupled to the receive path, control operation of the hybrid coupler-based T/R switch.Type: ApplicationFiled: January 5, 2021Publication date: July 1, 2021Inventors: Kashish Pal, Vikas Sharma, Sebastian Diebold, Leland Gilreath, Daoud Salameh, Farshid Aryanfar
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Patent number: 10141888Abstract: A FET based double balanced mixer (DBM) that exhibits good conversion gain and IIP3 values and provides improved linearity and wide bandwidth. In one embodiment, a first balun is configured to receive a local oscillator (LO) signal and generate two balanced LO signals that are coupled to two corresponding opposing nodes of a four-node FET ring. A second balun is configured to pass an RF signal on the unbalanced side. The FET ring includes at least four FETs connected as branches of a ring, with the source of each FET connected to the drain of a next FET in the ring. Each FET is preferably fabricated as, or configured as, a low threshold voltage device having its gate connected to its drain, which causes the FET to operate as a diode, but with the unique characteristic of having close to a zero turn-on voltage.Type: GrantFiled: August 14, 2017Date of Patent: November 27, 2018Assignee: pSemi CorporationInventor: Daoud Salameh
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Publication number: 20180062576Abstract: A FET based double balanced mixer (DBM) that exhibits good conversion gain and IIP3 values and provides improved linearity and wide bandwidth. In one embodiment, a first balun is configured to receive a local oscillator (LO) signal and generate two balanced LO signals that are coupled to two corresponding opposing nodes of a four-node FET ring. A second balun is configured to pass an RF signal on the unbalanced side. The FET ring includes at least four FETs connected as branches of a ring, with the source of each FET connected to the drain of a next FET in the ring. Each FET is preferably fabricated as, or configured as, a low threshold voltage device having its gate connected to its drain, which causes the FET to operate as a diode, but with the unique characteristic of having close to a zero turn-on voltage.Type: ApplicationFiled: August 14, 2017Publication date: March 1, 2018Inventor: Daoud Salameh
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Publication number: 20170288608Abstract: A FET based double balanced mixer (DBM) that exhibits good conversion gain and IIP3 values and provides improved linearity and wide bandwidth. In one embodiment, a first balun is configured to receive a local oscillator (LO) signal and generate two balanced LO signals that are coupled to two corresponding opposing nodes of a four-node FET ring. A second balun is configured to pass an RF signal on the unbalanced side. The FET ring includes at least four FETs connected as branches of a ring, with the source of each FET connected to the drain of a next FET in the ring. Each FET is preferably fabricated as, or configured as, a low threshold voltage device having its gate connected to its drain, which causes the FET to operate as a diode, but with the unique characteristic of having close to a zero turn-on voltage.Type: ApplicationFiled: March 29, 2016Publication date: October 5, 2017Inventor: Daoud Salameh
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Patent number: 9780728Abstract: A FET based double balanced mixer (DBM) that exhibits good conversion gain and IIP3 values and provides improved linearity and wide bandwidth. In one embodiment, a first balun is configured to receive a local oscillator (LO) signal and generate two balanced LO signals that are coupled to two corresponding opposing nodes of a four-node FET ring. A second balun is configured to pass an RF signal on the unbalanced side. The FET ring includes at least four FETs connected as branches of a ring, with the source of each FET connected to the drain of a next FET in the ring. Each FET is preferably fabricated as, or configured as, a low threshold voltage device having its gate connected to its drain, which causes the FET to operate as a diode, but with the unique characteristic of having close to a zero turn-on voltage.Type: GrantFiled: March 29, 2016Date of Patent: October 3, 2017Assignee: Peregrine Semiconductor CorporationInventor: Daoud Salameh