Patents by Inventor Dapeng Han

Dapeng Han has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240124455
    Abstract: The present invention is directed to tricyclic compounds, pharmaceutically acceptable compositions comprising compounds of the invention and methods of using said compositions in the treatment of various disorders.
    Type: Application
    Filed: January 21, 2022
    Publication date: April 18, 2024
    Inventors: Ying HAN, Dapeng LI, Huajun LONG, Tong WANG, Zhiyu YIN, Yu WANG
  • Patent number: 10963329
    Abstract: A checking module is coupled to one or more registers to verify data written to the one or more registers. The checking module includes a memory coupled to an arbiter to receive data and an address (corresponding to the data) from the arbiter. The data is written to the one or more registers at the address. Comparator logic is coupled to the memory and to the one or more registers to compare the data written to the one or more registers and the data in the memory. An error flag circuit is coupled to the comparator logic, and in response to a difference between the data in the memory and the data written to the one or more registers, the error flag circuit outputs an error signal.
    Type: Grant
    Filed: October 17, 2018
    Date of Patent: March 30, 2021
    Assignee: OmniVision Technologies, Inc.
    Inventor: Dapeng Han
  • Publication number: 20200125439
    Abstract: A checking module is coupled to one or more registers to verify data written to the one or more registers. The checking module includes a memory coupled to an arbiter to receive data and an address (corresponding to the data) from the arbiter. The data is written to the one or more registers at the address. Comparator logic is coupled to the memory and to the one or more registers to compare the data written to the one or more registers and the data in the memory. An error flag circuit is coupled to the comparator logic, and in response to a difference between the data in the memory and the data written to the one or more registers, the error flag circuit outputs an error signal.
    Type: Application
    Filed: October 17, 2018
    Publication date: April 23, 2020
    Inventor: Dapeng Han