Patents by Inventor Daren Streett

Daren Streett has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Debug circuit comparing processor instruction set operating mode
    Patent number: 8352713
    Abstract: A processor is operative to execute two or more instruction sets, each in a different instruction set operating mode. As each instruction is executed, debug circuit comparison the current instruction set operating mode to a target instruction set operating mode sent by a programmer, and outputs an alert or indication in they match. The alert or indication may additionally be dependent upon the instruction address following within a predetermined target address range. The alert or indication may comprise a breakpoint signal that halts execution and/or it is output as an external signal of the processor. The instruction address at which the processor detects a match in the instruction set operating modes may additionally be output. Additionally or alternatively, the alert or indication may comprise starting or stopping a trace operation, causing an exception, or any other known debugger function.
    Type: Grant
    Filed: August 9, 2006
    Date of Patent: January 8, 2013
    Assignee: QUALCOMM Incorporated
    Inventors: Kevin Charles Burke, Brian Michael Stempel, Daren Streett, Kevin Allen Sapp, Leslie Mark DeBruyne, Nabil Amir Rizk, Thomas Andrew Sartorius, Rodney Wayne Smith
  • Debug Circuit Comparing Processor Instruction Set Operating Mode
    Publication number: 20080040587
    Abstract: A processor is operative to execute two or more instruction sets, each in a different instruction set operating mode. As each instruction is executed, debug circuit comparison the current instruction set operating mode to a target instruction set operating mode sent by a programmer, and outputs an alert or indication in they match. The alert or indication may additionally be dependent upon the instruction address following within a predetermined target address range. The alert or indication may comprise a breakpoint signal that halts execution and/or it is output as an external signal of the processor. The instruction address at which the processor detects a match in the instruction set operating modes may additionally be output. Additionally or alternatively, the alert or indication may comprise starting or stopping a trace operation, causing an exception, or any other known debugger function.
    Type: Application
    Filed: August 9, 2006
    Publication date: February 14, 2008
    Inventors: Kevin Charles Burke, Brian Michael Stempel, Daren Streett, Kevin Allen Sapp, Leslie Mark DeBruyne, Nabil Amir Rizk, Thomas Andrew Sartorius, Rodney Wayne Smith