Abstract: Alternating copolymers having hydrocarbon-substituted terminal units and repeat units each containing two different monomer units with extreme ultraviolet (EUV)-absorbing elements are disclosed. Alternating copolymers having organic terminal units and repeat units each containing a monomer unit with an EUV-absorbing element and an organic monomer unit are also disclosed. A process of forming a polymer resist, which includes providing an alternating copolymer having repeat units with at least one EUV-absorbing monomer unit and replacing end groups of the alternating copolymer with unreactive terminal units, is disclosed as well.

Abstract: Embodiments of present invention provide a method of forming an extreme ultraviolet (EUV) mask. The method includes subliming a radiation-sensitive material onto a surface of an EUV blank substrate; exposing the radiation-sensitive material to an ionizing radiation to form an EUV mask pattern; and removing a portion of the radiation-sensitive material from the surface of the EUV blank substrate where the portion of the radiation-sensitive material is unexposed to the ionizing radiation. An EUV mask made therefrom, and the related radiation-sensitive material are also provided.

Abstract: A method of forming a multi color resist structure includes providing a substrate including an underlayer material; forming a first organic planarizing layer on the substrate; forming a first anti reflecting layer on the first organic planarizing layer, forming and developing a first patterned resist on the first anti reflecting layer; forming a second organic planarizing layer on the first anti reflecting layer and on the first patterned resist; forming a second anti reflecting layer on the second organic planarizing layer and forming and developing the second patterned resist, wherein the first patterned resist is a non-chemically amplified resist (n-CAR) or metal resist and the second patterned resist is CAR organic resist.

Abstract: A surface treatment composition and methods for improving adhesion of an organic layer on a titanium-containing hardmask includes forming a self-assembled monolayer on a surface of the titanium-containing hardmask prior to depositing the organic layer. The self-assembled monolayer is formed from a blend of alkyl phosphonic acids of formula (I): X(CH2)nPOOH2 (I), wherein n is 6 to 16 and X is either CH3 or COOH, wherein a ratio of the methyl terminated (CH3) alkyl phosphonic acid to the carboxyl terminated (COOH) alkyl phosphonic acid ranges from 25:75 to 75:25.

Abstract: Alternating copolymers having hydrocarbon-substituted terminal units and repeat units each containing two different monomer units with extreme ultraviolet (EUV)-absorbing elements are disclosed. Alternating copolymers having organic terminal units and repeat units each containing a monomer unit with an EUV-absorbing element and an organic monomer unit are also disclosed. A process of forming a polymer resist, which includes providing an alternating copolymer having repeat units with at least one EUV-absorbing monomer unit and replacing end groups of the alternating copolymer with unreactive terminal units, is disclosed as well.

Abstract: An adhesion promoter composition comprising at least one of the following compounds: (a) a cyclic compound having the formula: (b) a non-cyclic compound having the formula: wherein R1 and R2 each independently represents a non-photoactive phenyl, a photoactive phenyl or a C1-C4 alkyl; R3 represents a non-photoactive phenyl; R4 represents a photoactive phenyl; W represents Si or Ge; n represents an integer of value greater than 1; m represents an integer between 0 and 1.

Abstract: The subject disclosure relates to 3D microelectronic chip packages with embedded coolant channels. The disclosed 3D microelectronic chip packages provide a complete and practical mechanism for introducing cooling channels within the 3D chip stack while maintaining the electrical connection through the chip stack. According to an embodiment, a microelectronic package is provided that comprises a first silicon chip comprising first coolant channels interspersed between first thru-silicon-vias (TSVs). The microelectronic chip package further comprises a silicon cap attached to a first surface of the first silicon chip, the silicon cap comprising second TSVs that connect to the first TSVs. A second silicon chip comprising second coolant channels can further be attached to the silicon cap via interconnects formed between a first surface of the second silicon chip and the silicon cap, wherein the interconnects connect to the second TSVs.

Abstract: A patterning stack and methods are provided for semiconductor processing. The method includes forming a graded hardmask, the graded hardmask including a first material and a second material with extreme ultraviolet (EUV) absorption cross sections for absorption of EUV wavelengths, the second material configured to provide adhesion to photoresist materials. The method also includes depositing a photoresist layer over the graded hardmask. The method additionally includes patterning the photoresist layer. The method further includes etching the graded hardmask. The method also includes removing the photoresist layer.

Abstract: A metal brush layer is provided. The metal brush layer includes a polymer backbone including at least one grafting unit, G, attached to the polymer backbone, and a plurality of metal-containing moieties, M, attached to the polymer backbone.

Abstract: A method of making an adhesion layer of an extreme ultraviolet (EUV) stack is presented. The method includes grafting an ultraviolet (UV) sensitive polymer brush on a hardmask, the polymer brush including a UV cleavable unit, depositing EUV resist over the polymer brush, exposing the EUV resist to remove the EUV resist in exposed areas by applying a developer, and flooding the exposed area with a UV light and a solvent developer to remove exposed portions of the polymer brush.

Abstract: Embodiments of the present invention are directed to resist underlayer surface modifications. In a non-limiting embodiment of the invention, a photoresist patterning stack includes a resist underlayer on a substrate. The resist underlayer includes a surface modification having one or more moieties. The moieties can include acid quencher moieties that limit acid diffusion during a post exposure bake. The acid quencher moieties can include a tert-butoxycarbonyl protecting group (tBOC)-blocked amine that can be copolymerized with an acid generating underlayer. The moieties can also include base-catalyzed crosslinking moieties selected such that base-catalyzed crosslinking can occur upon exposure to a predetermined developer. The base-catalyzed crosslinking moieties can include an acetal group and the predetermined developer can include tetramethylammonium hydroxide (TMAH).

Abstract: A method of making an adhesion layer of an extreme ultraviolet (EUV) stack is presented. The method includes grafting an ultraviolet (UV) sensitive polymer brush on a hardmask, the polymer brush including a UV cleavable unit, depositing EUV resist over the polymer brush, exposing the EUV resist to remove the EUV resist in exposed areas by applying a developer, and flooding the exposed area with a UV light and a solvent developer to remove exposed portions of the polymer brush.

Abstract: A lithographic patterning method includes forming a multi-layer patterning material film stack on a semiconductor substrate, the patterning material film stack including a resist layer formed over one or more additional layers, and forming a metal-containing top coat over the resist layer. The method further includes exposing the multi-layer patterning material film stack to patterning radiation through the metal-containing top coat to form a desired pattern in the resist layer, removing the metal-containing top coat, developing the pattern formed in the resist layer, etching at least one underlying layer in accordance with the developed pattern, and removing remaining portions of the resist layer. The metal-containing top coat can be formed, for example, by atomic layer deposition or spin-on deposition over the resist layer, or by self-segregation from the resist layer.

Abstract: A stacked semiconductor microcooler includes a first and second semiconductor microcooler. Each microcooler includes silicon fins extending from a silicon substrate. A metal layer may be formed upon the fins. The microcoolers may be positioned such that the fins of each microcooler are aligned. One or more microcoolers may be thermally connected to a surface of a coolant conduit that is thermally connected to an electronic device heat generating device, such as an integrated circuit (IC) chip, or the like. Heat from the electronic device heat generating device may transfer to the one or more microcoolers. A flow of cooled liquid may be introduced through the conduit and heat from the one or more microcoolers may transfer to the liquid coolant.

Abstract: A patterning stack and methods are provided for semiconductor processing. The method includes forming a graded hardmask, the graded hardmask including a first material and a second material with extreme ultraviolet (EUV) absorption cross sections for absorption of EUV wavelengths, the second material configured to provide adhesion to photoresist materials. The method also includes depositing a photoresist layer over the graded hardmask. The method additionally includes patterning the photoresist layer. The method further includes etching the graded hardmask.

Abstract: A stacked semiconductor microcooler includes a first microcooler and a second microcooler. The microcoolers may be positioned such that the fins of each microcooler are vertically aligned. The microcoolers may include an inlet passage to accept coolant and an outlet passage to expel the coolant. One or more microcoolers may be thermally connected to an electronic device heat generating device, such as an integrated circuit (IC) chip, or the like. Heat from the electronic device heat generating device may transfer to the one or more microcoolers. A flow of cooled liquid may be introduced through the passages and heat from the one or more microcoolers may transfer to the liquid coolant.

Abstract: A semiconductor structure includes a semiconductor substrate and a multi-layer patterning material film stack formed on the semiconductor substrate. The patterning material film stack includes a resist layer formed over one or more additional layers. The semiconductor structure further includes a metal-containing top coat formed over the resist layer. The metal-containing top coat can be formed, for example, by atomic layer deposition or spin-on deposition over the resist layer, or by self-segregation from the resist layer.

Abstract: A metal brush layer is provided. The metal brush layer includes a polymer backbone including at least one grafting unit, G, attached to the polymer backbone, and a plurality of metal-containing moieties, M, attached to the polymer backbone.

Abstract: A patterning stack and methods are provided for semiconductor processing. The method includes forming a graded hardmask, the graded hardmask including a first material and a second material with extreme ultraviolet (EUV) absorption cross sections for absorption of EUV wavelengths, the second material configured to provide adhesion to photoresist materials. The method also includes depositing a photoresist layer over the graded hardmask. The method additionally includes patterning the photoresist layer. The method further includes etching the graded hardmask. The method also includes removing the photoresist layer.

Abstract: The subject disclosure relates to 3D microelectronic chip packages with embedded coolant channels. The disclosed 3D microelectronic chip packages provide a complete and practical mechanism for introducing cooling channels within the 3D chip stack while maintaining the electrical connection through the chip stack. According to an embodiment, a microelectronic package is provided that comprises a first silicon chip comprising first coolant channels interspersed between first thru-silicon-vias (TSVs). The microelectronic chip package further comprises a silicon cap attached to a first surface of the first silicon chip, the silicon cap comprising second TSVs that connect to the first TSVs. A second silicon chip comprising second coolant channels can further be attached to the silicon cap via interconnects formed between a first surface of the second silicon chip and the silicon cap, wherein the interconnects connect to the second TSVs.