Patents by Inventor Dario Pagnano

Dario Pagnano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230207636
    Abstract: A semiconductor device includes a type IV semiconductor base substrate, a first type III-V semiconductor layer formed on a first surface of the base substrate, and a second type III-V semiconductor layer with a different bandgap as the first type III-V being formed on the first type III-V semiconductor layer. The semiconductor device further includes first and second electrically conductive device terminals each being formed on the second type III-V semiconductor layer and each being in ohmic contact with the two-dimensional charge carrier gas. The base substrate includes a dielectric layer formed directly on a lower region of type IV semiconductor material, and a highly-doped layer of type IV semiconductor material formed directly on the dielectric layer.
    Type: Application
    Filed: February 19, 2023
    Publication date: June 29, 2023
    Inventors: Shu Yang, Giorgia Longobardi, Florin Udrea, Dario Pagnano, Gianluca Camuso, Jinming Sun, Mohamed Imam, Alain Charles
  • Patent number: 11588024
    Abstract: A semiconductor device includes a type IV semiconductor base substrate, a first type III-V semiconductor layer formed on a first surface of the base substrate, and a second type III-V semiconductor layer with a different bandgap as the first type III-V being formed on the first type III-V semiconductor layer. The semiconductor device further includes first and second electrically conductive device terminals each being formed on the second type III-V semiconductor layer and each being in ohmic contact with the two-dimensional charge carrier gas. The base substrate includes a first highly doped island that is disposed directly beneath the second device terminal and extends to the first surface of the base substrate. The first highly-doped island is laterally disposed between portions of semiconductor material having a lower net doping concentration than the first highly-doped island.
    Type: Grant
    Filed: March 17, 2017
    Date of Patent: February 21, 2023
    Assignee: Infineon Technologies Austria AG
    Inventors: Shu Yang, Giorgia Longobardi, Florin Udrea, Dario Pagnano, Gianluca Camuso, Jinming Sun, Mohamed Imam, Alain Charles
  • Publication number: 20180269282
    Abstract: A semiconductor device includes a type IV semiconductor base substrate, a first type III-V semiconductor layer formed on a first surface of the base substrate, and a second type III-V semiconductor layer with a different bandgap as the first type III-V being formed on the first type III-V semiconductor layer. The semiconductor device further includes first and second electrically conductive device terminals each being formed on the second type III-V semiconductor layer and each being in ohmic contact with the two-dimensional charge carrier gas. The base substrate includes a first highly doped island that is disposed directly beneath the second device terminal and extends to the first surface of the base substrate. The first highly-doped island is laterally disposed between portions of semiconductor material having a lower net doping concentration than the first highly-doped island.
    Type: Application
    Filed: March 17, 2017
    Publication date: September 20, 2018
    Inventors: Shu Yang, Giorgia Longobardi, Florin Udrea, Dario Pagnano, Gianluca Camuso, Jinming Sun, Mohamed Imam, Alain Charles