Patents by Inventor Darius Brown

Darius Brown has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Forming edge etch protection using dual layer of positive-negative tone resists
    Patent number: 10095115
    Abstract: Methods of forming edge etch protection using dual layers of positive-negative tone resists. According to a method, a wafer substrate is provided. A first type resist is deposited on a surface of the wafer substrate. The first type resist is patterned and a resist ring is created around a peripheral edge of the wafer substrate. The resist ring is cured. A second type resist is deposited on the surface of the wafer substrate and the resist ring. The second type resist is different from the first type resist.
    Type: Grant
    Filed: September 2, 2016
    Date of Patent: October 9, 2018
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Christopher B. Shing, Joyce C. Liu, Richard D. Kaplan, Timothy J. Wiltshire, Darius Brown
  • FORMING EDGE ETCH PROTECTION USING DUAL LAYER OF POSITIVE-NEGATIVE TONE RESISTS
    Publication number: 20180067396
    Abstract: Methods of forming edge etch protection using dual layers of positive-negative tone resists. According to a method, a wafer substrate is provided. A first type resist is deposited on a surface of the wafer substrate. The first type resist is patterned and a resist ring is created around a peripheral edge of the wafer substrate. The resist ring is cured. A second type resist is deposited on the surface of the wafer substrate and the resist ring. The second type resist is different from the first type resist.
    Type: Application
    Filed: September 2, 2016
    Publication date: March 8, 2018
    Applicant: GLOBALFOUNDRIES INC.
    Inventors: CHRISTOPHER B. SHING, JOYCE C. LIU, RICHARD D. KAPLAN, TIMOTHY J. WILTSHIRE, DARIUS BROWN
  • System and method for forming features on a semiconductor substrate
    Publication number: 20030087205
    Abstract: A system and method for forming features on a semiconductor wafer is provided. A reticle is part of the present system. The reticle includes a plurality of open design areas, which are used in combination with each other to form a feature on a semiconductor substrate.
    Type: Application
    Filed: November 6, 2001
    Publication date: May 8, 2003
    Inventors: Dennis Warner, Darius Brown