Abstract: An offset voltage compensation circuit and an isolation amplifier device including the same are provided. The offset voltage compensation circuit includes a first amplifier, a second amplifier, a first current source, a second current source, a first resistor and a second resistor. The first amplifier has a first input connected to a first differential input node and a first output connected to a first differential output node. The second amplifier has a first input connected to a second differential input node and a second output connected to a second differential output node. The first current source is connected to the first amplifier for providing a first current. The second current source is connected to the second amplifier for providing a second current. The first current source is controlled according to the second current and a difference between a first initial output voltage and a second initial output voltage.

Abstract: A low-dropout voltage regulator is provided. The low-dropout voltage regulator includes a differential amplifier pair, a secondary amplification circuit that is self-stabilized, an output circuit, and a frequency compensation circuit. The secondary amplification circuit includes a first amplification transistor and a second amplification transistor. The first amplification transistor includes a first terminal, a second terminal, and a third terminal. The second amplification transistor includes a first terminal, a second terminal, and a third terminal. The second terminal of the first amplification transistor is electrically connected to the second terminal of the second amplification transistor to form an input terminal of the secondary amplification circuit to be connected to an output terminal of the differential amplifier pair.

Abstract: A low-dropout voltage regulator is provided. The low-dropout voltage regulator includes a differential amplifier pair, a secondary amplification circuit that is self-stabilized, an output circuit, and a frequency compensation circuit. The secondary amplification circuit includes a first amplification transistor and a second amplification transistor. The first amplification transistor includes a first terminal, a second terminal, and a third terminal. The second amplification transistor includes a first terminal, a second terminal, and a third terminal. The second terminal of the first amplification transistor is electrically connected to the second terminal of the second amplification transistor to form an input terminal of the secondary amplification circuit to be connected to an output terminal of the differential amplifier pair.