Patents by Inventor Darrel E. Peugh

Darrel E. Peugh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7551439
    Abstract: An electronic assembly is provided having a thermal cooling fluid, such as a liquid, for cooling an electronic device within a sealed compartment. The assembly includes a housing generally defining a sealed fluid compartment, an electronic device disposed within the housing and a cooling liquid for cooling the electronic device. The assembly includes inlet and outlet ports in fluid communication with the sealed fluid compartment for allowing the cooling liquid to pass through the compartment to cool the electronic device. Fluid flow channels are formed in thermal communication with the electronic device within the housing. The fluid channels include channels that allow liquid to flow in thermal communication with the electronic device to cool the device.
    Type: Grant
    Filed: March 28, 2006
    Date of Patent: June 23, 2009
    Assignee: Delphi Technologies, Inc.
    Inventors: Darrel E. Peugh, Bruce A. Myers, Gary E. Oberlin
  • Patent number: 7538425
    Abstract: A power semiconductor device package utilizes integral fluid conducting micro-channels, one or more inlet ports for supplying liquid coolant to the micro-channels, and one or more outlet ports for exhausting coolant that has passed through the micro-channels. The semiconductor device is mounted on a single or multi-layer circuit board having electrical and fluid interconnect features that mate with the electrical terminals and inlet and outlet ports of the device to define a self-contained and self-sealed micro-channel heat exchanger.
    Type: Grant
    Filed: July 28, 2004
    Date of Patent: May 26, 2009
    Assignee: Delphi Technologies, Inc.
    Inventors: Bruce A. Myers, Darrel E. Peugh, Lester Wilkinson, Erich W. Gerbsch
  • Publication number: 20080290378
    Abstract: A low cost transistor package is provided for high power applications. The package provides high thermal conductivity and dissipation for a silicon transistor die, high current carrying capability and isolation, and high power and thermal cycle life performance and reliability. A dielectric layer is fixed to a silicon transistor die, for coupling to a heat conducting buffer and attachment to a substrate. The dielectric layer is fixed to the die by growing the dielectric layer, depositing the dielectric layer, or applying the dielectric layer using a plasma spray. In an aspect, a conductive layer is formed to the silicon transistor die by a thermal or kinetic spray process, and the dielectric layer is applied to the conductive layer. The dielectric layer may also be established either before or after the transistor fabrication. Electrical and thermal interconnects are advantageously positioned from opposite sides of the silicon transistor die.
    Type: Application
    Filed: May 21, 2007
    Publication date: November 27, 2008
    Inventors: Bruce A. Myers, Darrel E. Peugh, Alaa A. Elmoursi, Thomas Hubert Van Steenkiste, Zhibo Zhao, Bryan A. Gillispie
  • Patent number: 7365981
    Abstract: A fluid-cooled electronic assembly including a base having a fluid inlet and a fluid outlet therein, a cap attached to the base to form a fluid containment chamber therebetween, wherein the fluid containment chamber is in fluid communication with the fluid inlet and the fluid outlet, and an electronic device disposed within the fluid containment chamber and connected to the base, the electronic device having a plurality of microchannels adapted to receive a cooling fluid flow therethrough, wherein the cap is shaped to direct a fluid flow from the fluid inlet to the microchannels such that a pressure drop between the fluid inlet and the fluid outlet is reduced.
    Type: Grant
    Filed: June 28, 2005
    Date of Patent: April 29, 2008
    Assignee: Delphi Technologies, Inc.
    Inventors: Bruce A. Myers, Darrel E. Peugh, Henry M. Sanftleben
  • Patent number: 7215547
    Abstract: The present invention provides a method for producing an electronic assembly and an electronic assembly with an integrated cooling system for dissipating heat. The electronic assembly comprises a base; and at least one electrical component attached to the base. The base defines an integrated cooling system having a fluid channel spanning within the base and at least one heat exchanger in heat communication with the fluid channel. The integrated cooling system may further include a pump attached to the base for directing the flow of the fluid within the fluid channel, and a port in fluid communication with the fluid channel for receiving fluid from an external source.
    Type: Grant
    Filed: August 16, 2004
    Date of Patent: May 8, 2007
    Assignee: Delphi Technologies, Inc.
    Inventors: Shih-Chia Chang, Bruce A. Myers, Darrel E. Peugh, Carl W. Berlin, M. Ray Fairchild
  • Patent number: 7106588
    Abstract: The present invention relates to an apparatus and method for dissipating heat from high-power electronic devices. The assembly includes a high-current substrate, such as a printed circuit board supporting an electronic device, a heat pipe thermally coupled with the electronic device and an assembly case which also forms a heat sink, and thermal transient suppression material which may be thermally coupled with the electronic device and the heat pipe.
    Type: Grant
    Filed: October 27, 2003
    Date of Patent: September 12, 2006
    Assignee: Delphi Technologies, Inc.
    Inventors: Gary E. Oberlin, Bruce A. Myers, Thomas A. Degenkolb, Darrel E. Peugh
  • Patent number: 6833628
    Abstract: A package and packaging method that incorporates multiple surface-mounted devices mounted to the package, which in turn can be mounted onto a circuit board. The package generally includes a pair of laminate substrates that together form a chip carrier and input/output (I/O) interface structure for the devices. The devices are mounted to opposite surface of a first of the substrates. The second substrate is attached to the first substrate, and has an interior opening therethrough. The first and second substrates are attached to each other such that devices mounted on one surface of the first substrate are disposed within the interior opening of the second laminate substrate. A mold compound can be applied to underfill and encapsulate the devices mounted to the surfaces of the first substrate.
    Type: Grant
    Filed: December 17, 2002
    Date of Patent: December 21, 2004
    Assignee: Delphi Technologies, Inc.
    Inventors: Scott D. Brandenburg, Darrel E. Peugh, Matthew R. Walsh
  • Publication number: 20040113281
    Abstract: A package and packaging method that incorporates multiple surface-mounted devices mounted to the package, which in turn can be mounted onto a circuit board. The package generally includes a pair of laminate substrates that together form a chip carrier and input/output (I/O) interface structure for the devices. The devices are mounted to opposite surfaces of a first of the substrates. The second substrate is attached to the first substrate, and has an interior opening therethrough. The first and second substrates are attached to each other such that devices mounted on one surface of the first substrate are disposed within the interior opening of the second laminate substrate. A mold compound can be applied to underfill and encapsulate the devices mounted to the surfaces of the first substrate.
    Type: Application
    Filed: December 17, 2002
    Publication date: June 17, 2004
    Inventors: Scott D. Brandenburg, Darrel E. Peugh, Matthew R. Walsh
  • Patent number: 6560110
    Abstract: A corrosive resistant electronics assembly 10 is provided including at least one heat generating electronics component 12 mounted on a substrate 14 and positioned within potting material 18. A thermally conductive block element 24 is thermally mounted to the at least one heat generating electronics component 12 and positioned within the potting material 18, thereby providing a corrosive resistant electronics assembly 10 with improved thermal dissipation.
    Type: Grant
    Filed: February 22, 2002
    Date of Patent: May 6, 2003
    Assignee: Delphi Technologies, Inc.
    Inventors: Bruce A. Myers, Thomas A. Degenkolb, Henry M. Sanftleben, Darrel E. Peugh
  • Patent number: 6045032
    Abstract: A method of preventing solder reflow of a SMT component (14) attached with solder (22) to a circuit board (10) that subsequently undergoes a wave soldering operation. The method generally entails the use of a thermal shield (18, 28) that is either part of the support structure (12) for the circuit board (10) during the wave soldering operation, or a temporary mask (28) applied directly to a surface of the circuit board (10). In each case, the thermal shield (18, 28) is configured to contact and completely cover a limited surface region of the circuit board (10) directly opposite the SMT component (14). To provide adequate thermal protection, the covered surface region is preferably as large as or larger than the surface area of the component (14). In a preferred embodiment, the perimeter of the thermal shield (18, 28) has a tapered thickness, e.g., a beveled edge, that enables uninterrupted wave soldering of the surface surrounding the thermal shield (18, 28).
    Type: Grant
    Filed: July 31, 1998
    Date of Patent: April 4, 2000
    Assignee: Delco Electronics Corp.
    Inventors: Stuart E Longgood, Douglas E Gullion, Darrel E Peugh, Wayne Anthony Sozansky