Patents by Inventor Darrel Eugene Peugh

Darrel Eugene Peugh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6535396
    Abstract: A combination circuit board (12) and segmented bus structure (54) defines a composite circuit board/bus assembly (52) upon which an electrical circuit may be assembled. The various segments (54a-54f) of bus structure (54) may be variously configured to achieve one or more assembly, performance, testing, and/or reliability goals. For example, one bus segment configuration provides integral connector tabs (54a and 54e) for mechanical and/or electrical connection to interconnecting wires or electrical terminals of one or more external devices. Another bus segment configuration (54d) provides for mechanical and high current electrical interconnections between one or more bus segments (54a-54f) and one or more electrical components (16, 18, 20) and/or conductive film patterns(64) formed on top surface (12b) of the circuit board (12).
    Type: Grant
    Filed: April 28, 2000
    Date of Patent: March 18, 2003
    Assignee: Delphi Technologies, Inc.
    Inventors: Thomas Alan Degenkolb, Darrel Eugene Peugh, Bruce Alan Myers
  • Patent number: 6156980
    Abstract: A circuit structure and method for conducting heat from a power flip chip. Heat is dissipated from a flip chip mounted to a PCB by conducting heat through conductive vias to the opposite surface of the PCB. The flip chip is equipped with two sets of solder bumps, one of which is registered with conductors on the PCB, while the second is registered with a thermal conductor layer on the PCB surface and electrically isolated from the conductors. A second thermal conductor layer on the opposite surface of the PCB contacts the vials, such that heat is conducted from the flip chip to the second thermal conductor layer through the second set of solder bumps, the first thermal conductor layer, and the conductive vias. A heatsink is embedded in the PCB between the vias and the second thermal conductor layer to further promote heat conduction away from the flip chip. Heat can be conducted from the PCB with a second heatsink, such as a housing that encloses the PCB.
    Type: Grant
    Filed: June 4, 1998
    Date of Patent: December 5, 2000
    Assignee: Delco Electronics Corp.
    Inventors: Darrel Eugene Peugh, Joanna Christine Berndt, Bruce Alan Myers
  • Patent number: 5953814
    Abstract: A process and combination of materials for underfilling a surface-mount IC device (12), such as a flip chip, for the purpose of increasing the thermal cycle fatigue life of the terminals (14) that attach the device (12) to a thin-laminate organic circuit board (10), such as a printed wiring board (PWB) or printed circuit board (PCB). The process parameters and materials, including the underfill (20), masking (22) and cleaning materials used, exhibit a synergistic effect that increases thermal cycle fatigue resistance to a level at which a flip chip processed in accordance with this invention is capable of reliably withstanding at least 1000 one-hour cycles between -40.degree. C. and 150.degree. C. The materials and the manner in which the device (12) and circuit board (10) are prepared for application of the materials are critical to eliminating tendencies for inconsistent reliability in underfilled SM devices.
    Type: Grant
    Filed: February 27, 1998
    Date of Patent: September 21, 1999
    Assignee: Delco Electronics Corp.
    Inventors: Wayne Anthony Sozansky, Michael D. Gibson, Susan Acheson Mack, Michael Patrick Meehan, Darrel Eugene Peugh, James M. Rosson, Robin L. Sellers, Michael Ray Witty