Patents by Inventor Darrell G. Schlom

Darrell G. Schlom has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240136178
    Abstract: Various embodiments disclosed herein provide for several methods of fabricating p-type semiconductors with industrially relevant hole mobilities that are back end of the line (BEOL) compatible. A first method of fabrication includes forming a buffer layer on a substrate, forming a palladium oxide layer over the buffer layer, annealing the palladium oxide layer, and then forming a cap layer over the palladium oxide layer, then cooling the stack, wherein each step is performed at a variety of predefined temperatures. Each of the substrate, buffer layer and cap layer can be magnesium oxide. A second method includes forming a palladium oxide layer over a titanium dioxide substrate, annealing the stack, and then cooling the stack, all performed at a different variety of predefined temperatures.
    Type: Application
    Filed: December 20, 2022
    Publication date: April 25, 2024
    Inventors: Darrell G. Schlom, Jiaxin Sun, Jisung Park, Kyle Shen, Christopher Parzyck
  • Publication number: 20230352584
    Abstract: Technologies for a transistor with a ferroelectric gate dielectric are disclosed. In the illustrative embodiment, a transistor has a ferroelectric gate dielectric that is lattice matched to the channel of the transistor. In one embodiment, the ferroelectric polarization changes when voltage is applied and removed from a gate electrode, facilitating switching of the transistor at a lower applied voltage. In another embodiment, the ferroelectric polarization of a gate dielectric of a transistor changes when the voltage is past a positive threshold value or a negative threshold value. Such a transistor can be used as a one transistor memory cell.
    Type: Application
    Filed: May 2, 2022
    Publication date: November 2, 2023
    Inventors: Dmitri Evgenievich Nikonov, Chia-Ching Lin, Uygar E. Avci, Tanay A. Gosavi, Raseong Kim, Ian Alexander Young, Hai Li, Ashish Verma Penumatcha, Ramamoorthy Ramesh, Darrell G. Schlom
  • Publication number: 20230353157
    Abstract: Magnetoelectric spin-orbit logic (MESO) devices comprise a magnetoelectric switch capacitor coupled to a spin-orbit coupling structure. The logic state of the MESO device is represented by the magnetization orientation of the ferromagnet of the magnetoelectric switch capacitor and the spin-orbit coupling structure converts the magnetization orientation of the ferromagnet to an output current. MESO devices in which all or at least some of the constituent layers of the device are perovskite materials can provide advantages such as improved control over the manufacturing of MESO devices and high quality interfaces between MESO layers due to the lattice matching of perovskite materials.
    Type: Application
    Filed: April 29, 2022
    Publication date: November 2, 2023
    Inventors: Tanay A. Gosavi, Chia-Ching Lin, Sasikanth Manipatruni, Dmitri Evgenievich Nikonov, Ian Alexander Young, Ramamoorthy Ramesh, Darrell G. Schlom, Megan E. Holtz, Rachel A. Steinhardt
  • Publication number: 20230178585
    Abstract: A dielectric thin film includes a stack structure of a perovskite material layer including at least two Group II elements and a rocksalt layer on the perovskite material layer and including at least two Group II elements. A first content ratio of the at least two Group II elements included in the perovskite material layer may be the same as a second content ratio of the at least two Group II elements included in the rocksalt layer.
    Type: Application
    Filed: December 1, 2022
    Publication date: June 8, 2023
    Applicants: Samsung Electronics Co., Ltd., Cornell University
    Inventors: Kiyoung LEE, Darrell G. Schlom, Matthew R. Barone, Myoungho Jeong
  • Patent number: 11462402
    Abstract: Molecular-beam epitaxy (MBE) and more particularly suboxide MBE (S-MBE) and related structures are disclosed. S-MBE is disclosed that includes the use of a molecular beam of a suboxide that may be subsequently oxidized in a single step reaction to form an oxide film. By way of example, for a gallium oxide (Ga2O3) film, a molecular beam including a suboxide of gallium (Ga2O) may be provided. S-MBE may be performed in adsorption-controlled regimes where there is an excess of source material containing species in order to promote high growth rates for oxide films with improved crystallinity. Source mixtures for providing molecular beams of suboxides are disclosed that include mixtures of a particular element and an oxide of the element in ratios that promote such adsorption-controlled growth regimes. Related structures include oxide films having increased thickness with reduced crystal defects, including single polymorph films of gallium oxide.
    Type: Grant
    Filed: October 21, 2020
    Date of Patent: October 4, 2022
    Assignees: Cornell University, The Penn State Research Foundation
    Inventors: Patrick Vogt, Darrell G. Schlom, Felix V. E. Hensling, Kathy Azizie, Zi-Kui Liu, Brandon J. Bocklund, Shun-Li Shang
  • Publication number: 20220122843
    Abstract: Molecular-beam epitaxy (MBE) and more particularly suboxide MBE (S-MBE) and related structures are disclosed. S-MBE is disclosed that includes the use of a molecular beam of a suboxide that may be subsequently oxidized in a single step reaction to form an oxide film. By way of example, for a gallium oxide (Ga2O3) film, a molecular beam including a suboxide of gallium (Ga2O) may be provided. S-MBE may be performed in adsorption-controlled regimes where there is an excess of source material containing species in order to promote high growth rates for oxide films with improved crystallinity. Source mixtures for providing molecular beams of suboxides are disclosed that include mixtures of a particular element and an oxide of the element in ratios that promote such adsorption-controlled growth regimes. Related structures include oxide films having increased thickness with reduced crystal defects, including single polymorph films of gallium oxide.
    Type: Application
    Filed: October 21, 2020
    Publication date: April 21, 2022
    Inventors: Patrick Vogt, Darrell G. Schlom, Felix V. E. Hensling, Kathy Azizie, Zi-Kui Liu, Brandon J. Bocklund, Shun-Li Shang
  • Patent number: 11276728
    Abstract: A heterostructure includes a substrate exhibiting a piezoelectric effect, and a magnetostrictive film supported by the substrate. The magnetostrictive film includes an iron-gallium alloy. The iron-gallium alloy has a gallium composition greater than 20%.
    Type: Grant
    Filed: February 7, 2020
    Date of Patent: March 15, 2022
    Assignees: The Regents of the University of Michigan, Cornell University
    Inventors: John Thomas Heron, Peter Benjamin Meisenheimer, Darrell G. Schlom, Rachel Steinhardt
  • Patent number: 11133179
    Abstract: A thin-film structure includes a support layer and a dielectric layer on the support layer. The support layer includes a material having a lattice constant. The dielectric layer includes a compound having a Ruddlesden-Popper phase (An+1BnX3n+1). where A and B each independently include a cation, X is an anion, and n is a natural number. The lattice constant of the material of the support layer may be less than a lattice constant of the compound.
    Type: Grant
    Filed: November 27, 2019
    Date of Patent: September 28, 2021
    Assignees: Samsung Electronics Co., Ltd., Cornell University
    Inventors: Kiyoung Lee, Woojin Lee, Myoungho Jeong, Yongsung Kim, Eunsun Kim, Hyosik Mun, Jooho Lee, Changseung Lee, Kyuho Cho, Darrell G. Schlom, Craig J. Fennie, Natalie M. Dawley, Gerhard H. Olsen, Zhe Wang
  • Publication number: 20210249468
    Abstract: A heterostructure includes a substrate exhibiting a piezoelectric effect, and a magnetostrictive film supported by the substrate. The magnetostrictive film includes an iron-gallium alloy. The iron-gallium alloy has a gallium composition greater than 20%.
    Type: Application
    Filed: February 7, 2020
    Publication date: August 12, 2021
    Inventors: John Thomas Heron, Peter Benjamin Meisenheimer, Darrell G. Schlom, Rachel Steinhardt
  • Publication number: 20210159072
    Abstract: A thin-film structure includes a support layer and a dielectric layer on the support layer. The support layer includes a material having a lattice constant. The dielectric layer includes a compound having a Ruddlesden-Popper phase (An+1BnX3n+1). where A and B each independently include a cation, X is an anion, and n is a natural number. The lattice constant of the material of the support layer may be less than a lattice constant of the compound.
    Type: Application
    Filed: November 27, 2019
    Publication date: May 27, 2021
    Applicants: Samsung Electronics Co., Ltd., Cornell University
    Inventors: Kiyoung LEE, Woojin LEE, Myoungho JEONG, Yongsung KIM, Eunsun KIM, Hyosik MUN, Jooho LEE, Changseung LEE, Kyuho CHO, Darrell G. SCHLOM, Craig J. FENNIE, Natalie M. DAWLEY, Gerhard H. OLSEN, Zhe WANG
  • Patent number: 7449738
    Abstract: A strained thin film structure includes a substrate layer formed of a crystalline scandate material having a top surface, and a strained layer of crystalline ferroelectric epitaxially grown with respect to the crystalline substrate layer so as to be in a strained state and at a thickness below which dislocations begin to occur in the crystalline ferroelectric layer. An intermediate layer may be grown between the top surface of the substrate layer and the ferroelectric layer wherein the intermediate layer carries the lattice structure of the underlying substrate layer. The properties of the ferroelectric film are greatly enhanced as compared to the bulk ferroelectric material, and such films are suitable for use in applications including ferroelectric memories.
    Type: Grant
    Filed: October 29, 2004
    Date of Patent: November 11, 2008
    Assignee: Wisconsin Alumni Research Foundation
    Inventors: Chang-Beom Eom, Kyung-Jin Choi, Darrell G. Schlom, Long-Qing Chen
  • Patent number: 6797341
    Abstract: Thin films of conducting and superconducting materials are formed by a process which combines physical vapor deposition with chemical vapor deposition. Embodiments include forming boride films, such as magnesium diboride, in high purity with superconducting properties on substrates typically used in the semiconductor industry by physically generating magnesium vapor in a deposition chamber and introducing a boron containing precursor into the chamber which combines with the magnesium vapor to form a thin boride film on the substrate.
    Type: Grant
    Filed: March 25, 2003
    Date of Patent: September 28, 2004
    Assignee: Penn State Research Foundation
    Inventors: Xianghui Zeng, Alexej Pogrebnyakov, Xiaoxing Xi, Joan M. Redwing, Zi-Kui Liu, Darrell G. Schlom
  • Patent number: 6642539
    Abstract: A ferroelectric memory cell formed on a monocrystalline silicon underlayer, either an epitaxial silicon contact plug to a transistor source or drain or silicon gate region for which the memory cell forms a non-volatile gate. A conductive barrier layer of doped strontium titanate, whether cationically substituted, such by lanthanum or niobium for strontium and titanium respectively, or anionically deficient, is epitaxially grown over the silicon, and a lower metal oxide electrode layer, a ferroelectric layer and an upper metal oxide electrode layer are epitaxially grown on the barrier layer. No platinum barrier is needed beneath the ferroelectric stack. The invention can be applied to many other functional oxide materials of the Ruddlesden-Popper and devices including micromachined electromechanical (MEM) devices and ferromagnetic tri-layer devices.
    Type: Grant
    Filed: August 29, 2002
    Date of Patent: November 4, 2003
    Assignees: University of Maryland, The Penn State Research Foundation
    Inventors: Ramamoorthy Ramesh, Darrell G. Schlom
  • Publication number: 20030062553
    Abstract: A ferroelectric memory cell formed on a monocrystalline silicon underlayer, either an epitaxial silicon contact plug to a transistor source or drain or silicon gate region for which the memory cell forms a non-volatile gate. A conductive barrier layer of doped strontium titanate, whether cationically substituted, such by lanthanum or niobium for strontium and titanium respectively, or anionically deficient, is epitaxially grown over the silicon, and a lower metal oxide electrode layer, a ferroelectric layer and an upper metal oxide electrode layer are epitaxially grown on the barrier layer. No platinum barrier is needed beneath the ferroelectric stack. The invention can be applied to many other functional oxide materials of the Ruddlesden-Popper and devices including micromachined electromechanical (MEM) devices and ferromagnetic tri-layer devices.
    Type: Application
    Filed: August 29, 2002
    Publication date: April 3, 2003
    Inventors: Ramamoorthy Ramesh, Darrell G. Schlom
  • Patent number: 5602080
    Abstract: This method for manufacturing lattice-matched substrates for high-T.sub.c superconductors employs at least two materials chosen from the group of known suitable substrate materials, of which one has a lattice constant smaller than the lattice constant(s) of the perovskite subcell of the selected superconductor material, while the other one has a lattice constant greater than the lattice constant of the perovskite subcell of the selected superconductor. These materials are then powdered and mixed intimately for providing a single-crystal either from the molten mixture of the chosen materials or by thin film deposition, said single-crystal containing appropriate molar percentages of the chosen materials so that resulting lattice constant is essentially the same as that of the selected superconductor material.
    Type: Grant
    Filed: February 9, 1994
    Date of Patent: February 11, 1997
    Assignee: International Business Machines Corporation
    Inventors: Johannes G. Bednorz, Jochen D. Mannhart, Carl A. Mueller, Darrell G. Schlom
  • Patent number: 5528052
    Abstract: Proposed is a method for operating a field-effect device comprised of a superconducting current channel having source and drain electrodes connected thereto, said superconducting current channel being separated from a gate electrode by an insulating layer, where the resistance of said current channel is controlled by varying the critical current of the superconducting material through the application of an electrical field across the superconducting current channel, which in turn changes the density of the mobile charge carriers in the superconducting material. Taught is also an inverted MISFET device for performing that method, the device being characterized in that on an electrically conductive substrate an insulating layer is provided which in turn carries a layer consisting of a superconducting material, and that a gate electrode is attached to said substrate, and source and drain electrodes are electrically connected to said superconductor layer.
    Type: Grant
    Filed: December 22, 1993
    Date of Patent: June 18, 1996
    Assignee: International Business Machines Corporation
    Inventors: Johannes G. Bednorz, Jochen D. Mannhart, Carl A. Mueller, Darrell G. Schlom