Patents by Inventor Darrell K. Cox

Darrell K. Cox has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6915478
    Abstract: In a Reed-Solomon decoder, error magnitudes are determined from a root matrix and a syndrome vector. The root matrix is triangularized (60) using recursive calculations. The syndrome vector is adjusted to the triangulization (62) by recursive calculations. The error magnitudes are then determined through substitution (64).
    Type: Grant
    Filed: December 21, 2001
    Date of Patent: July 5, 2005
    Assignee: Texas Instruments Incorporated
    Inventor: Darrell K Cox
  • Patent number: 6910177
    Abstract: Viterbi decoding is implemented using an asymmetrical trellis 70 having an A-trellis 72 and a B-trellis 74. The trellis 70 is designed for efficient implementation on a processing device 40 with arithmetic units 42 having multi-field arithmetic and logic capabilities By concurrently processing multiple path metrics in separate fields, a highly efficient decoder may be implemented in a software-controlled device.
    Type: Grant
    Filed: December 21, 2001
    Date of Patent: June 21, 2005
    Assignee: Texas Instruments Incorporated
    Inventor: Darrell K. Cox
  • Publication number: 20030126542
    Abstract: In a Reed-Solomon decoder, error magnitudes are determined from a root matrix and a syndrome vector. The root matrix is triangularized (60) using recursive calculations. The syndrome vector is adjusted to the triangulization (62) by recursive calculations. The error magnitudes are then determined through substitution (64).
    Type: Application
    Filed: December 21, 2001
    Publication date: July 3, 2003
    Inventor: Darrell K. Cox
  • Publication number: 20030120993
    Abstract: Viterbi decoding is implemented using an asymmetrical trellis 70 having an A-trellis 72 and a B-trellis 74. The trellis 70 is designed for efficient implementation on a processing device 40 with arithmetic units 42 having multi-field arithmetic and logic capabilities By concurrently processing multiple path metrics in separate fields, a highly efficient decoder may be implemented in a software-controlled device.
    Type: Application
    Filed: December 21, 2001
    Publication date: June 26, 2003
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventor: Darrell K. Cox