Patents by Inventor Darrell Sellers

Darrell Sellers has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Functional interrupt mitigation for fault tolerant computer
    Patent number: 7237148
    Abstract: A new method for the detection and correction of environmentally induced functional interrupts (or “hangs”) induced in computers or microprocessors caused by external sources of single event upsets (SEU) which propagate into the internal control functions, or circuits, of the microprocessor. This method is named Hardened Core (or H-Core) and is based upon the addition of an environmentally hardened circuit added into the computer system and connected to the microprocessor to provide monitoring and interrupt or reset to the microprocessor when a functional interrupt occurs. The Hardened Core method can be combined with another method for the detection and correction of single bit errors or faults induced in a computer or microprocessor caused by external sources SEUs.
    Type: Grant
    Filed: September 8, 2003
    Date of Patent: June 26, 2007
    Inventors: David Czajkowski, Darrell Sellers
  • Functional interrupt mitigation for fault tolerant computer
    Publication number: 20050055607
    Abstract: A new method for the detection and correction of environmentally induced functional interrupts (or “hangs”) induced in computers or microprocessors caused by external sources of single event upsets (SEU) which propagate into the internal control functions, or circuits, of the microprocessor. This method is named Hardened Core (or H-Core) and is based upon the addition of an environmentally hardened circuit added into the computer system and connected to the microprocessor to provide monitoring and interrupt or reset to the microprocessor when a functional interrupt occurs. The Hardened Core method can be combined with another method for the detection and correction of single bit errors or faults induced in a computer or microprocessor caused by external sources SEUs.
    Type: Application
    Filed: September 8, 2003
    Publication date: March 10, 2005
    Inventors: David Czajkowski, Darrell Sellers
  • Functional interrupt mitigation for fault tolerant computer
    Patent number: RE42314
    Abstract: A new method for the detection and correction of environmentally induced functional interrupts (or “hangs”) induced in computers or microprocessors caused by external sources of single event upsets (SEU) which propagate into the internal control functions, or circuits, of the microprocessor. This method is named Hardened Core (or H-Core) and is based upon the addition of an environmentally hardened circuit added into the computer system and connected to the microprocessor to provide monitoring and interrupt or reset to the microprocessor when a functional interrupt occurs. The Hardened Core method can be combined with another method for the detection and correction of single bit errors or faults induced in a computer or microprocessor caused by external sources SEUs.
    Type: Grant
    Filed: June 24, 2009
    Date of Patent: April 26, 2011
    Assignee: Space Micro, Inc.
    Inventors: David R. Czajkowski, Darrell Sellers