Patents by Inventor Darren V. Goedekc

Darren V. Goedekc has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Stressor integration and method thereof
    Patent number: 7528029
    Abstract: A method is provided for making a semiconductor device. In accordance with the method, a substrate (203) is provided which has first (205) and second (207) gate structures thereon. A first stressor layer (215) is formed over the substrate, and a sacrificial layer (216) is formed over the first stressor layer. A second stressor layer (219) is formed over the sacrificial layer.
    Type: Grant
    Filed: April 21, 2006
    Date of Patent: May 5, 2009
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Paul A. Grudowski, Darren V. Goedekc, John J. Hackenberg