Patents by Inventor Darryl Galipeau
Darryl Galipeau has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240107669Abstract: A circuit board assembly may include a first circuit board including a first slot. The circuit board assembly may include a second circuit board. The first circuit board may be interlocked with the second circuit board via interlocking provided by the second circuit board into the first slot.Type: ApplicationFiled: September 26, 2022Publication date: March 28, 2024Inventors: Darryl Galipeau, Danny Clavette, Darryl TSCHIRHART
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Patent number: 11811316Abstract: A power supply system comprises: a switched-capacitor converter, a controller, and a monitor. Via generation of control signals, the controller controls settings of switches in the switched-capacitor converter to convert a received input voltage to an output voltage that powers a load. The monitor in the power supply system at least occasionally determines an impedance associated with the switched-capacitor converter. A magnitude of the determined impedance provides an indication whether the switched-capacitor converter is operating efficiently. To ensure efficient operation of the switched-capacitor converter, based on input form the monitor, the controller adjusts the control signals controlling the switches in the switched-capacitor converter as a function of the determined impedance.Type: GrantFiled: December 20, 2018Date of Patent: November 7, 2023Assignee: Infineon Technologies Austria AGInventors: Benjamin L. Schwabe, Christian Rainer, Darryl Galipeau
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Patent number: 11683889Abstract: An interposer for a processor includes: an electrically insulating material having a first main side and a second main side opposite the first main side; an electrical interface for a processor substrate at the first main side of the electrically insulating material; and a power device module embedded in the electrically insulating material and configured to convert a voltage provided at the second main side of the electrically insulating material to a lower voltage. The power device module has at least one contact configured to receive the voltage provided at the second main side of the electrically insulating material. Distribution circuitry embedded in the electrically insulating material is configured to carry the lower voltage provided by the power device module to the first main side of the electrically insulating material.Type: GrantFiled: September 15, 2021Date of Patent: June 20, 2023Assignee: Infineon Technologies Austria AGInventors: Danny Clavette, Darryl Galipeau
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Publication number: 20220007512Abstract: An interposer for a processor includes: an electrically insulating material having a first main side and a second main side opposite the first main side; an electrical interface for a processor substrate at the first main side of the electrically insulating material; and a power device module embedded in the electrically insulating material and configured to convert a voltage provided at the second main side of the electrically insulating material to a lower voltage. The power device module has at least one contact configured to receive the voltage provided at the second main side of the electrically insulating material. Distribution circuitry embedded in the electrically insulating material is configured to carry the lower voltage provided by the power device module to the first main side of the electrically insulating material.Type: ApplicationFiled: September 15, 2021Publication date: January 6, 2022Inventors: Danny Clavette, Darryl Galipeau
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Patent number: 11147165Abstract: An interposer for a processor includes: an electrically insulating material having a first main side and a second main side opposite the first main side; a plurality of electrically conductive structures embedded in the electrically insulating material and configured to provide an electrical interface for a processor substrate at the first main side of the electrically insulating material and to provide electrical connections from the electrical interface to the second main side of the electrically insulating material; and a power device module embedded in the electrically insulating material and configured to convert a voltage provided at the second main side of the electrically insulating material to a lower voltage at the first main side of the electrically insulating material.Type: GrantFiled: October 17, 2019Date of Patent: October 12, 2021Assignee: Infineon Technologies Austria AGInventors: Danny Clavette, Darryl Galipeau
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Publication number: 20210120676Abstract: An interposer for a processor includes: an electrically insulating material having a first main side and a second main side opposite the first main side; a plurality of electrically conductive structures embedded in the electrically insulating material and configured to provide an electrical interface for a processor substrate at the first main side of the electrically insulating material and to provide electrical connections from the electrical interface to the second main side of the electrically insulating material; and a power device module embedded in the electrically insulating material and configured to convert a voltage provided at the second main side of the electrically insulating material to a lower voltage at the first main side of the electrically insulating material.Type: ApplicationFiled: October 17, 2019Publication date: April 22, 2021Inventors: Danny Clavette, Darryl Galipeau
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Publication number: 20200204070Abstract: A power supply system comprises: a switched-capacitor converter, a controller, and a monitor. Via generation of control signals, the controller controls settings of switches in the switched-capacitor converter to convert a received input voltage to an output voltage that powers a load. The monitor in the power supply system at least occasionally determines an impedance associated with the switched-capacitor converter. A magnitude of the determined impedance provides an indication whether the switched-capacitor converter is operating efficiently. To ensure efficient operation of the switched-capacitor converter, based on input form the monitor, the controller adjusts the control signals controlling the switches in the switched-capacitor converter as a function of the determined impedance.Type: ApplicationFiled: December 20, 2018Publication date: June 25, 2020Inventors: Benjamin L. Schwabe, Christian Rainer, Darryl Galipeau
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Patent number: 10681819Abstract: In one example, a method includes drilling a cavity into each contact pad of one or more contact pads of a first printed circuit board to form one or more cavities. The first printed circuit board includes an embedded integrated circuit and one or more metal layers. The method further includes forming one or more first metal layers for a second printed circuit board below a bottom surface of the first printed circuit board. The method further includes forming an electrically conductive material in the one or more cavities. The electrically conductive material electrically couples the one or more contact pads of the first printed circuit board to the second printed circuit board. The method further includes forming one or more second metal layers for the second printed circuit board above a top surface of the first printed circuit board.Type: GrantFiled: December 18, 2018Date of Patent: June 9, 2020Assignee: Infineon Technologies Austria AGInventors: Eung San Cho, Danny Clavette, Darryl Galipeau
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Publication number: 20190124773Abstract: In one example, a method includes drilling a cavity into each contact pad of one or more contact pads of a first printed circuit board to form one or more cavities. The first printed circuit board includes an embedded integrated circuit and one or more metal layers. The method further includes forming one or more first metal layers for a second printed circuit board below a bottom surface of the first printed circuit board. The method further includes forming an electrically conductive material in the one or more cavities. The electrically conductive material electrically couples the one or more contact pads of the first printed circuit board to the second printed circuit board. The method further includes forming one or more second metal layers for the second printed circuit board above a top surface of the first printed circuit board.Type: ApplicationFiled: December 18, 2018Publication date: April 25, 2019Applicant: Infineon Technologies Americas Corp.Inventors: Eung San Cho, Danny Clavette, Darryl Galipeau
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Patent number: 10206286Abstract: In one example, a method includes drilling a cavity into each contact pad of one or more contact pads of a first printed circuit board to form one or more cavities. The first printed circuit board includes an embedded integrated circuit and one or more metal layers. The method further includes forming one or more first metal layers for a second printed circuit board below a bottom surface of the first printed circuit board. The method further includes forming an electrically conductive material in the one or more cavities. The electrically conductive material electrically couples the one or more contact pads of the first printed circuit board to the second printed circuit board. The method further includes forming one or more second metal layers for the second printed circuit board above a top surface of the first printed circuit board.Type: GrantFiled: June 26, 2017Date of Patent: February 12, 2019Assignee: Infineon Technologies Austria AGInventors: Eung San Cho, Danny Clavette, Darryl Galipeau
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Publication number: 20180376598Abstract: In one example, a method includes drilling a cavity into each contact pad of one or more contact pads of a first printed circuit board to form one or more cavities. The first printed circuit board includes an embedded integrated circuit and one or more metal layers. The method further includes forming one or more first metal layers for a second printed circuit board below a bottom surface of the first printed circuit board. The method further includes forming an electrically conductive material in the one or more cavities. The electrically conductive material electrically couples the one or more contact pads of the first printed circuit board to the second printed circuit board. The method further includes forming one or more second metal layers for the second printed circuit board above a top surface of the first printed circuit board.Type: ApplicationFiled: June 26, 2017Publication date: December 27, 2018Applicant: Infineon Technologies Americas Corp.Inventors: Eung San Cho, Danny Clavette, Darryl Galipeau
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Patent number: 10074620Abstract: A semiconductor package includes a semiconductor die having a control transistor and a sync transistor, an integrated output inductor having a winding around a core, and coupled to the semiconductor die, where the winding includes a plurality of top conductive clips connected to a plurality of bottom conductive clips. The control transistor and the sync transistor are configured as a half-bridge. The integrated output inductor is coupled to a switched node of the half-bridge. At least one of the plurality of top conductive clips and the plurality of bottom conductive clips includes a partially etched portion and a non-etched portion. The semiconductor die is attached to the integrated output inductor by a die attach material. The semiconductor die and the integrated output inductor are encapsulated in a molding compound.Type: GrantFiled: February 2, 2016Date of Patent: September 11, 2018Assignee: Infineon Technologies Americas Corp.Inventors: Eung San Cho, Darryl Galipeau, Dan Clavette
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Patent number: 9922912Abstract: In some examples, a device comprises a first leadframe segment, a second leadframe segment, and a first transistor, wherein the first transistor is electrically connected to the first leadframe segment. The device further comprises a second transistor, wherein the second transistor is electrically connected to the second leadframe segment. The device further comprises a conductive element, wherein the conductive element is electrically connected to the first transistor and the second transistor. The device further comprises a capacitor, wherein a first end of the capacitor is electrically connected to the first leadframe segment and a second end of the capacitor is electrically connected to the second leadframe segment.Type: GrantFiled: September 7, 2016Date of Patent: March 20, 2018Assignee: Infineon Technologies Americas Corp.Inventors: Eung San Cho, Danny Clavette, Darryl Galipeau
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Publication number: 20180068934Abstract: In some examples, a device comprises a first leadframe segment, a second leadframe segment, and a first transistor, wherein the first transistor is electrically connected to the first leadframe segment. The device further comprises a second transistor, wherein the second transistor is electrically connected to the second leadframe segment. The device further comprises a conductive element, wherein the conductive element is electrically connected to the first transistor and the second transistor. The device further comprises a capacitor, wherein a first end of the capacitor is electrically connected to the first leadframe segment and a second end of the capacitor is electrically connected to the second leadframe segment.Type: ApplicationFiled: September 7, 2016Publication date: March 8, 2018Inventors: Eung San Cho, Danny Clavette, Darryl Galipeau
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Patent number: 9831159Abstract: In one implementation, a semiconductor package includes a control transistor and a sync transistor of a power converter switching stage attached over a first patterned conductive carrier, as well as a magnetic material situated over leads of the first patterned conductive carrier. The semiconductor package also includes a second patterned conductive carrier attached over the first patterned conductive carrier, the control and sync transistors, and the magnetic material. Leads of the second patterned conductive carrier overlie the magnetic material and are coupled to the leads of the first patterned conductive carrier so as to form windings of an output inductor for the power converter switching stage, the output inductor being integrated into the semiconductor package.Type: GrantFiled: April 19, 2016Date of Patent: November 28, 2017Assignee: Infineon Technologies Americas Corp.Inventors: Eung San Cho, Darryl Galipeau, Danny Clavette
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Publication number: 20160365304Abstract: In one implementation, a semiconductor package includes a control transistor and a sync transistor of a power converter switching stage attached over a first patterned conductive carrier, as well as a magnetic material situated over leads of the first patterned conductive carrier. The semiconductor package also includes a second patterned conductive carrier attached over the first patterned conductive carrier, the control and sync transistors, and the magnetic material. Leads of the second patterned conductive carrier overlie the magnetic material and are coupled to the leads of the first patterned conductive carrier so as to form windings of an output inductor for the power converter switching stage, the output inductor being integrated into the semiconductor package.Type: ApplicationFiled: April 19, 2016Publication date: December 15, 2016Inventors: Eung San Cho, Darryl Galipeau, Danny Clavette
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Publication number: 20160286656Abstract: A semiconductor package includes a semiconductor die having a control transistor and a sync transistor, an integrated output inductor having a winding around a core, and coupled to the semiconductor die, where the winding includes a plurality of top conductive clips connected to a plurality of bottom conductive clips. The control transistor and the sync transistor are configured as a half-bridge. The integrated output inductor is coupled to a switched node of the half-bridge. At least one of the plurality of top conductive clips and the plurality of bottom conductive clips includes a partially etched portion and a non-etched portion. The semiconductor die is attached to the integrated output inductor by a die attach material. The semiconductor die and the integrated output inductor are encapsulated in a molding compound.Type: ApplicationFiled: February 2, 2016Publication date: September 29, 2016Inventors: Eung San Cho, Darryl Galipeau, Dan Clavette