Patents by Inventor Darryl Jessie
Darryl Jessie has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20220166127Abstract: An antenna module is described. The antenna module include a ground plane in a multilayer substrate. The antenna module also includes a mold on the multilayer substrate. The antenna module further includes a conductive wall separating a first portion of the mold from a second portion of the mold. The conductive wall is electrically coupled to the ground plane. A conformal shield may be placed on a surface of the second portion of the mold. The conformal shield is electrically coupled to the ground plane.Type: ApplicationFiled: February 7, 2022Publication date: May 26, 2022Inventors: Seong Heon JEONG, Rajneesh KUMAR, Mohammad Ali TASSOUDJI, Darryl JESSIE, Gurkanwal SAHOTA, Kevin Hsi Huai WANG, Jeong IL KIM, Taesik YANG, Thomas MYERS, Neil BURNS, Julio ZEGARRA, Clinton James WILBER, Jordan SZABO
-
Patent number: 11245175Abstract: An antenna module is described. The antenna module include a ground plane in a multilayer substrate. The antenna module also includes a mold on the multilayer substrate. The antenna module further includes a conductive wall separating a first portion of the mold from a second portion of the mold. The conductive wall is electrically coupled to the ground plane. A conformal shield may be placed on a surface of the second portion of the mold. The conformal shield is electrically coupled to the ground plane.Type: GrantFiled: September 27, 2018Date of Patent: February 8, 2022Assignee: QUALCOMM IncorporatedInventors: Seong Heon Jeong, Rajneesh Kumar, Mohammad Ali Tassoudji, Darryl Jessie, Gurkanwal Sahota, Kevin Hsi Huai Wang, Jeong Il Kim, Taesik Yang, Thomas Myers, Neil Burns, Julio Zegarra, Clinton James Wilber, Jordan Szabo
-
Publication number: 20190103653Abstract: An antenna module is described. The antenna module include a ground plane in a multilayer substrate. The antenna module also includes a mold on the multilayer substrate. The antenna module further includes a conductive wall separating a first portion of the mold from a second portion of the mold. The conductive wall is electrically coupled to the ground plane. A conformal shield may be placed on a surface of the second portion of the mold. The conformal shield is electrically coupled to the ground plane.Type: ApplicationFiled: September 27, 2018Publication date: April 4, 2019Inventors: Seong Heon JEONG, Rajneesh KUMAR, Mohammad Ali TASSOUDJI, Darryl JESSIE, Gurkanwal SAHOTA, Kevin Hsi Huai WANG, Jeong KIM, II, Taesik YANG, Thomas MYERS, Neil BURNS, Julio ZEGARRA, Clinton James WILBER, Jordan SZABO
-
Patent number: 9985591Abstract: A power amplification device includes a power amplifier core stage and a power amplifier driver stage. The power amplifier driver stage receives a radio frequency signal to be amplified by the power amplification device. The power amplifier driver stage includes a first source follower input transistor and a first current source transistor. A source of the first source follower input transistor is coupled to a drain of the first current source transistor. The source of the first source follower input transistor is directly coupled to the power amplifier core stage to drive the power amplifier core stage. An input match and passive voltage gain device is coupled to the power amplifier driver stage to generate a voltage gain at an input of the power amplifier driver stage. A first bias source is configured to generate a first bias signal to bias the power amplifier driver stage.Type: GrantFiled: January 31, 2017Date of Patent: May 29, 2018Assignee: QUALCOMM IncorporatedInventors: Jeremy Goldblatt, Darryl Jessie
-
Publication number: 20180123532Abstract: A power amplification device includes a power amplifier core stage and a power amplifier driver stage. The power amplifier driver stage receives a radio frequency signal to be amplified by the power amplification device. The power amplifier driver stage includes a first source follower input transistor and a first current source transistor. A source of the first source follower input transistor is coupled to a drain of the first current source transistor. The source of the first source follower input transistor is directly coupled to the power amplifier core stage to drive the power amplifier core stage. An input match and passive voltage gain device is coupled to the power amplifier driver stage to generate a voltage gain at an input of the power amplifier driver stage. A first bias source is configured to generate a first bias signal to bias the power amplifier driver stage.Type: ApplicationFiled: January 31, 2017Publication date: May 3, 2018Inventors: Jeremy GOLDBLATT, Darryl JESSIE
-
Patent number: 9537197Abstract: In an integrated circuit package that houses radio-frequency (RF) circuits or components using wafer-level packaging (WLP), an RF-signal transmission structure includes a signal-carrying conductive line positioned between grounded conductive lines to avoid undesirable coupling between the signal-carrying conductive line and other RF circuits or components in the same package.Type: GrantFiled: December 3, 2014Date of Patent: January 3, 2017Assignee: QUALCOMM IncorporatedInventors: Darryl Jessie, Lan Nan
-
Publication number: 20160164158Abstract: In an integrated circuit package that houses radio-frequency (RF) circuits or components using wafer-level packaging (WLP), an RF-signal transmission structure includes a signal-carrying conductive line positioned between grounded conductive lines to avoid undesirable coupling between the signal-carrying conductive line and other RF circuits or components in the same package.Type: ApplicationFiled: December 3, 2014Publication date: June 9, 2016Inventors: Darryl JESSIE, Lan NAN
-
Publication number: 20160125995Abstract: An apparatus configured to isolate a direct current component voltage of a first circuit from a direct current component voltage of a second circuit in which the apparatus includes a first conductor and a second conductor. The first conductor has a first portion disposed to substantially enclose a first area, a second portion disposed within the first area, a third portion disposed to substantially enclose a second area, and a fourth portion disposed within the second area, the second area lacking an intersection with the first area. The second conductor is configured to be magnetically coupled to the first conductor and has a fifth portion disposed between the first portion and the second portion and a sixth portion disposed between the third portion and the fourth portion.Type: ApplicationFiled: October 31, 2014Publication date: May 5, 2016Inventors: Miena ARMANIOUS, Darryl JESSIE, Thomas Andrew MYERS
-
Publication number: 20100013238Abstract: A wind turbine and generator apparatus for mounting on a substantially vertical fixed cylindrical object includes a stationary generator member encircling the cylindrical object and fixed to the cylindrical object. A rotating generator member encloses the stationary generator member, and is rotatably supported by the stationary generator member. A plurality of blades is mounted to the rotating generator member such that a wind contacting the blades is operative to rotate the rotating generator member about the stationary generator member to generate electrical energy.Type: ApplicationFiled: November 14, 2007Publication date: January 21, 2010Inventors: Darryl Jessie, Dave A. Cote
-
Publication number: 20090148288Abstract: A horizontal axis wind turbine apparatus includes a turbine assembly comprising a generator mounted in a housing, a rotor operative to rotate the generator in response to wind forces, and a tail extending rearward from the housing, and a base adapted to be mounted on a tower. The housing is pivotally attached to the base about a horizontal pivot axis oriented substantially perpendicular to a rotational axis of the generator and located rearward of a center of gravity of the turbine assembly such that the housing can pivot upward about the pivot axis from a lowered position to a raised position. A spring is operative to exert a downward bias force on the housing to urge the housing toward the lowered position.Type: ApplicationFiled: December 8, 2008Publication date: June 11, 2009Inventors: Darryl Jessie, Dave A. Cote
-
Patent number: 7460001Abstract: A variable inductor can be formed on an integrated circuit with a primary conductor, a secondary conductor, and a switch. The primary conductor implements an inductor and may be formed in various patterns (e.g., a spiral). The secondary conductor forms a loop in proximity to (e.g., on the outside of) the primary conductor. The switch couples in series with the secondary conductor and opens or closes the loop. The inductance of the inductor is varied by closing and opening the loop with the switch. A current source may also be coupled in series with the secondary conductor and used to control the current flow in the secondary conductor to either increase or decrease the inductance. Multiple loops may be formed to change the inductance in more than two discrete steps. The variable inductor may be used for various applications such as filters, VCOs, and impedance matching networks.Type: GrantFiled: September 25, 2003Date of Patent: December 2, 2008Assignee: QUALCOMM IncorporatedInventor: Darryl Jessie
-
Patent number: 7271465Abstract: Techniques for “strapping” a primary conductor with a secondary conductor in an integrated circuit (IC). The IC includes a number of circuit elements interconnected by a secondary conductor through a number of vias disposed at a number of locations for coupling the circuit elements as an alternative to a primary conductor. The primary conductor is typically formed with a low loss metal (e.g., copper or copper alloy), and the secondary conductor is typically formed with a lossy metal (e.g., aluminum or aluminum alloy) relative to the low loss metal. The secondary conductor is strapped to the primary conductor by the vias, which may be disposed only at both ends or along the entire length of the secondary conductor. The secondary conductor is formed using design guidelines such that it provides the required electrical connectivity when the primary conductor is not present but minimally interferes with the RF performance of the primary conductor.Type: GrantFiled: July 9, 2002Date of Patent: September 18, 2007Assignee: Qualcomm Inc.Inventors: Darryl Jessie, Charles J. Persico
-
Publication number: 20050068146Abstract: A variable inductor can be formed on an integrated circuit with a primary conductor, a secondary conductor, and a switch. The primary conductor implements an inductor and may be formed in various patterns (e.g., a spiral). The secondary conductor forms a loop in proximity to (e.g., on the outside of) the primary conductor. The switch couples in series with the secondary conductor and opens or closes the loop. The inductance of the inductor is varied by closing and opening the loop with the switch. A current source may also be coupled in series with the secondary conductor and used to control the current flow in the secondary conductor to either increase or decrease the inductance. Multiple loops may be formed to change the inductance in more than two discrete steps. The variable inductor may be used for various applications such as filters, VCOs, and impedance matching networks.Type: ApplicationFiled: September 25, 2003Publication date: March 31, 2005Inventor: Darryl Jessie
-
Publication number: 20030202331Abstract: Techniques for “strapping” a primary conductor with a secondary conductor in an integrated circuit (IC). The IC includes a number of circuit elements interconnected by a secondary conductor through a number of vias disposed at a number of locations for coupling the circuit elements as an alternative to a primary conductor. The primary conductor is typically formed with a low loss metal (e.g., copper or copper alloy), and the secondary conductor is typically formed with a lossy metal (e.g., aluminum or aluminum alloy) relative to the low loss metal. The secondary conductor is strapped to the primary conductor by the vias, which may be disposed only at both ends or along the entire length of the secondary conductor. The secondary conductor is formed using design guidelines such that it provides the required electrical connectivity when the primary conductor is not present but minimally interferes with the RF performance of the primary conductor.Type: ApplicationFiled: July 9, 2002Publication date: October 30, 2003Inventors: Darryl Jessie, Charles J. Persico