Abstract: A video line processor for varying the size of a video image portion along a video line in an image processor in which image size variation occurs first along horizontal lines and then along vertical lines and in which intermediate and final frames are stored in memories in which row and column addressing is interchanged on alternate frames. The line processor has a line memory for storing pixel values along each video line, has a pair of arithmetic circuits, one of which receives pixel values delayed in relation to pixel values received by the other, and has a coefficient memory with memory locations corresponding to pixel values along a video line, each of these locations being loaded between video frames with an address for the line memory and with coefficients for the arithmetic circuits to control, respectively, the position of each pixel value along a line and the transformation of the value.

Abstract: A method and processor for varying the size of a digitized video image in bstantially two video frame times by transforming successive lines of the image along one axis and then transforming successive lines of the image along the other axis.

Abstract: A video zoom processor digitally processes video imagery information in a simultaneous two-dimensional format. Size and position transformation factors are incorporated in the image via processing. The size specification delay for the reduction factor is one video frame time and for the expansion factor it is zero video frame time. The specification delay for the position or translation factor is zero video frame time. Also implemented into the processed image is the pixel averaging algorithm in which each output pixel is the value of the weighted average of certain input pixels for purposes of gray level determination.