Patents by Inventor Daryl H Allred

Daryl H Allred has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6895562
    Abstract: A method and apparatus of carrying out a computer assisted analysis function on a hierarchical circuit model. The method is carried out by inputting the hierarchical circuit model, specifying at least one circuit block within the hierarchy as a target of the function on the target block, and simplifying the hierarchical circuit model by deleting circuit blocks not affecting the analysis function, to produce a simplified hierarchical circuit model. A computer assisted analysis function can then be carried out on the simplified hierarchical circuit model.
    Type: Grant
    Filed: August 27, 2002
    Date of Patent: May 17, 2005
    Assignee: Agilent Technologies, Inc.
    Inventors: John G Rohrbaugh, Jeff Rearick, Daryl H Allred
  • Publication number: 20040044972
    Abstract: A method and apparatus of carrying out a computer assisted analysis function on a hierarchical circuit model. The method is carried out by inputting the hierarchical circuit model, specifying at least one circuit block within the hierarchy as a target of the function on the target block, and simplifying the hierarchical circuit model by deleting circuit blocks not affecting the analysis function, to produce a simplified hierarchical circuit model. A computer assisted analysis function can then be carried out on the simplified hierarchical circuit model.
    Type: Application
    Filed: August 27, 2002
    Publication date: March 4, 2004
    Inventors: John G. Rohrbaugh, Jeff Rearick, Daryl H. Allred
  • Patent number: 4752907
    Abstract: A scan apparatus provides an interface and control signals between a secondary computer and data locations in a host computer. The scan apparatus functions independently of the normal operation of the host computer. Scan-out is performed transparently to the operation of the host computer. The host computer is constructed using circuits on semiconductor chips. The semiconductor chips are organized in blocks. Chips within each block include scan apparatus which controls the scan operations in connection with that chip. The scan apparatus in each chip is connected through two I/O pins to a clock line and to a bidirectional scan data line. The scan apparatus on each chip includes a multimode sequencer so that each chip in each block can be independently performing scan sequences. The block scan apparatus and the secondary computer perform the functions of requesting a scan sequence for transmitting the scan data.
    Type: Grant
    Filed: June 30, 1986
    Date of Patent: June 21, 1988
    Assignee: Amdahl Corporation
    Inventors: Stephen S. C. Si, James B. Shackleford, Daryl H. Allred