Patents by Inventor Daryl Wayne Bradley

Daryl Wayne Bradley has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200043489
    Abstract: A voice assistant device comprises an input to receive data defining an audio command; and processing circuitry to perform an operation defined by the audio command responsive to an activation of the voice assistant device; wherein the activation comprises determining presence of an activation source within an activation region from one or more sensors.
    Type: Application
    Filed: July 15, 2019
    Publication date: February 6, 2020
    Inventors: Daryl Wayne Bradley, Daren Croxford, Amyas Edward Wykes Phillips, Robert Arnold Calico, III
  • Publication number: 20200005640
    Abstract: An apparatus comprising an input to receive identifier parameters for one or more identifiers, where the identifiers are displayable at a display device mounted or mountable in a vehicle. The apparatus may comprise a storage device to store identifier parameters for at least one of the one or more identifiers. The apparatus may also comprise a locating module to determine a location parameter relating to the display device. Also the apparatus may comprise a processor to select an identifier for display at the display device based, at least in part, on the stored identifier parameters for one of the one or more identifiers matching the location parameter relating to the display device.
    Type: Application
    Filed: June 26, 2019
    Publication date: January 2, 2020
    Inventors: Francois Christopher Jacques Botman, Thomas Christopher Grocutt, Daryl Wayne Bradley, Marianne Crowder
  • Publication number: 20170222815
    Abstract: A method of controlling a data processing device, the method comprising: receiving, at the data processing device, a communication from a remote device wherein the communication comprises verification data; verifying the verification data at the data processing device; initiating an action by a watchdog associated with the data processing device based on the verification.
    Type: Application
    Filed: July 15, 2015
    Publication date: August 3, 2017
    Inventors: Milosch MERIAC, Daryl Wayne BRADLEY
  • Publication number: 20160286363
    Abstract: A system for automatically ascertaining the location of wireless functional devices, such as lights and switches, in a building. Information from the devices is generated by receipt of electromagnetic signals from other devices, to calculate a best fit for the relative location of the devices in relation to each other. Preferably a map of the building is adduced to refine the location process, for instance by tying the location of a light switch to a wall or a light to a ceiling. The information is used to ascertain that, for example, two devices are in the same room and can be associated with each other. Account can be taken of variable features of the building such as partition walls, to update device settings. There is thus no need to survey the building manually.
    Type: Application
    Filed: March 10, 2016
    Publication date: September 29, 2016
    Inventors: Hugo John Martin Vincent, Daryl Wayne Bradley
  • Patent number: 8762744
    Abstract: A data processing apparatus and methods are disclosed. The data processing apparatus comprises: data processing elements operable to process data; an energy management unit operable to generate energy management information indicative of an energy state of at least one of the data processing elements when processing said data; and logic operable to receive said energy management information and to generate energy management information items associating said energy state with the processing of said data. The information items can provide visibility of how the Energy State of the data processing elements vary in response to the processing of data. Providing this visibility of the Energy State can advantageously enable more detailed the energy management to be performed and the Energy State of the data processing elements to be optimized.
    Type: Grant
    Filed: December 6, 2005
    Date of Patent: June 24, 2014
    Assignee: ARM Limited
    Inventors: Simon Andrew Ford, Daryl Wayne Bradley, George James Milne, John Michael Horley
  • Patent number: 8468394
    Abstract: A data processing apparatus is disclosed, said data processing apparatus comprising a plurality of devices, trace logic associated with at least one of said plurality of devices, and tagging logic associated with at least one of said plurality of devices, said tagging logic being operable to: select at least one item, said at least one item comprising an activity to be monitored; provide said at least one selected item with tag data identifying said at least one item as an item to be monitored; and said trace logic being operable to: detect tagged items processed by said at least one device; and output trace information relating to at least some of said detected tagged items.
    Type: Grant
    Filed: March 9, 2006
    Date of Patent: June 18, 2013
    Assignee: ARM Limited
    Inventors: Daryl Wayne Bradley, John Michael Horley, Sheldon James Woodhouse
  • Patent number: 8219885
    Abstract: A data processing system includes a register file having a plurality of registers storing respective register data values and an associated register value cache having a plurality of storage locations storing corresponding cache data values. There are fewer cache data values than registers. When a register is to be read, both the register data value and, if present, a cache data value from a corresponding storage location within the register value cache are read and compared by a comparator. This generates a match signal which indicates if the data values do not match that one of the data values is in error. The match signal stalls the processing and a CRC code initially stored with the cache data value and recalculated based upon the read cache data value are compared to determine whether or not the cache data value has changed since it was stored. If the cache data value has not changed, then it is correct and is output instead of the register data value.
    Type: Grant
    Filed: August 15, 2006
    Date of Patent: July 10, 2012
    Assignees: ARM Limited, The Regents of the University of Michigan
    Inventors: Daryl Wayne Bradley, Jason Andrew Blome, Scott Mahlke
  • Patent number: 8020039
    Abstract: A data processing system is provided in which processing circuitry performs at least one of a series of data processing operations in dependence upon a set of data values and control circuitry controls execution of the data processing operations. Control path error detection circuitry is provided for detecting a control path error associated with an error in operation of the control circuitry and data path error handling circuitry is arranged to handle recovery from errors in the data values. The control path error detection circuitry is configured to cause the data path error handling circuitry to perform recovery from detected control path errors enabling the series of data processing operations to continue despite the occurrence of the control path error. An associated method and computer program product are also provided.
    Type: Grant
    Filed: December 1, 2008
    Date of Patent: September 13, 2011
    Assignee: ARM Limited
    Inventors: Alastair David Reid, Daryl Wayne Bradley
  • Patent number: 7926021
    Abstract: A method of selecting where error detection circuits should be placed within an integrated circuit uses simulation of a reference and test design with errors injected into the test design and then fan out analysis performed upon those injected errors to identify error propagation characteristics. Thus, registers at which propagated errors are highly likely to manifest themselves or which protect key architectural state, or which protect state not otherwise protected can be identified and so an efficient deployment of error detection mechanisms achieved. Within an integrated circuit output signals from inactive circuit elements may be subject to isolation gating in dependence upon a detected current state of the integrated circuit. Thus, inactive circuit elements in which soft errors occur have inappropriate output signals gated from reaching the rest of the integrated circuit and thus reducing erroneous operation.
    Type: Grant
    Filed: October 3, 2005
    Date of Patent: April 12, 2011
    Assignee: ARM Limited
    Inventors: Jason Andrew Blome, Krisztian Flautner, Daryl Wayne Bradley
  • Patent number: 7866560
    Abstract: Within an integrated circuit (2) independently controllable domains (4, 6, 8, 10, 5 12, 14) may be unable to complete pending transactions taking place between domains. Each domain is provided with a state machine (20, 22) which is responsive to the state of the state machine within the other domain and when this indicates that the other domain is not communicating triggers modified behavior. This can provide that the predetermined transaction protocol is not broken and/or complete a partially completed transaction when the domain concerned has recovered from an error or other event which disrupted the communication.
    Type: Grant
    Filed: January 4, 2007
    Date of Patent: January 11, 2011
    Assignee: ARM Limited
    Inventors: Sheldon James Woodhouse, Richard Roy Grisenthwaite, Daryl Wayne Bradley, Edmond John Simon Ashfield
  • Publication number: 20090292977
    Abstract: A data processing system includes a register file (2) having a plurality of registers storing respective register data values and an associated register value cache (12) having a plurality of storage locations (14) storing corresponding cache data values. There are fewer cache data values than registers. When a register is to be read, both the register data value and, if present, a cache data value from a corresponding storage location (14) within the register value cache (12) are read and compared by a comparator (18). This generates a match signal which indicates if the data values do not match that one of the data values is in error. The match signal stalls the processing and a CRC code initially stored with the cache data value and recalculated based upon the read cache data value are compared to determine whether or not the cache data value has changed since it was stored. If the cache data value has not changed, then it is correct and is output instead of the register data value.
    Type: Application
    Filed: August 15, 2006
    Publication date: November 26, 2009
    Inventors: Daryl Wayne Bradley, Jason Andrew Blome, Scott Mahlke
  • Patent number: 7617409
    Abstract: A data processing system is provided having a clock signal comparator comprising a reference input port for receiving a reference clock signal and at least a further input port for receiving respective further clock signal. Checking logic is provided within the clock signal comparator to check for a correspondence between the clock edge of the reference clock signal and a corresponding clock edge of the further clock signal within a predetermined time window. The checking logic is operable to check for the correspondence during operation of the data processing system. The clock-signal comparator can be provided on an integrated circuit or as part of the data processing apparatus having at least two different timing domains such as timing domains associated with two different instances of the same clock.
    Type: Grant
    Filed: May 1, 2006
    Date of Patent: November 10, 2009
    Assignee: ARM Limited
    Inventors: David Michael Gilday, Daryl Wayne Bradley, Edmond John Simon Ashfield
  • Publication number: 20090254767
    Abstract: A data processing apparatus and methods are disclosed. The data processing apparatus comprises: data processing elements operable to process data; an energy management unit operable to generate energy management information indicative of an energy state of at least one of the data processing elements when processing said data; and logic operable to receive said energy management information and to generate energy management information items associating said energy state with the processing of said data. The information items can provide visibility of how the Energy State of the data processing elements vary in response to the processing of data. Providing this visibility of the Energy State can advantageously enable more detailed the energy management to be performed and the Energy State of the data processing elements to be optimized.
    Type: Application
    Filed: December 6, 2005
    Publication date: October 8, 2009
    Applicant: ARM LIMITED
    Inventors: Simon Andrew Ford, Daryl Wayne Bradley, George James Milnb, John Michael Horley
  • Publication number: 20090177928
    Abstract: A data processing apparatus is disclosed, said data processing apparatus comprising a plurality of devices, trace logic associated with at least one of said plurality of devices, and tagging logic associated with at least one of said plurality of devices, said tagging logic being operable to: select at least one item, said at least one item comprising an activity to be monitored; provide said at least one selected item with tag data identifying said at least one item as an item to be monitored; and said trace logic being operable to: detect tagged items processed by said at least one device; and output trace information relating to at least some of said detected tagged items.
    Type: Application
    Filed: March 9, 2006
    Publication date: July 9, 2009
    Inventors: Daryl Wayne Bradley, John Michael Horley, Sheldon James Woodhouse
  • Publication number: 20090150722
    Abstract: A data processing system is provided in which processing circuitry performs at least one of a series of data processing operations in dependence upon a set of data values and control circuitry controls execution of the data processing operations. Control path error detection circuitry is provided for detecting a control path error associated with an error in operation of the control circuitry and data path error handling circuitry is arranged to handle recovery from errors in the data values. The control path error detection circuitry is configured to cause the data path error handling circuitry to perform recovery from detected control path errors enabling the series of data processing operations to continue despite the occurrence of the control path error. An associated method and computer program product are also provided.
    Type: Application
    Filed: December 1, 2008
    Publication date: June 11, 2009
    Inventors: Alastair David Reid, Daryl Wayne Bradley
  • Publication number: 20090049331
    Abstract: A method of selecting where error detection circuits should be placed within an integrated circuit uses simulation of a reference and test design with errors injected into the test design and then fan out analysis performed upon those injected errors to identify error propagation characteristics. Thus, registers at which propagated errors are highly likely to manifest themselves or which protect key architectural state, or which protect state not otherwise protected can be identified and so an efficient deployment of error detection mechanisms achieved. Within an integrated circuit output signals from inactive circuit elements may be subject to isolation gating in dependence upon a detected current state of the integrated circuit. Thus, inactive circuit elements in which soft errors occur have inappropriate output signals gated from reaching the rest of the integrated circuit and thus reducing erroneous operation.
    Type: Application
    Filed: October 3, 2005
    Publication date: February 19, 2009
    Inventors: Jason Andrew Blome, Krisztian Flautner, Daryl Wayne Bradley
  • Publication number: 20080036487
    Abstract: An integrated circuit is provided with latency detecting circuitry for detecting signal generation latency within one or more functional circuits and in response thereto to generate a wearout response. The wearout response can take a variety of different forms such as reducing the operating frequency, increasing the operating voltage, operating task allocation within a multiprocessor system, manufacturing test binning and other wearout responses.
    Type: Application
    Filed: July 27, 2007
    Publication date: February 14, 2008
    Applicants: ARM LIMITED, UNIVERSITY OF MICHIGAN
    Inventors: Daryl Wayne Bradley, Jason Andrew Blome, Scott Mahlke
  • Patent number: 7325168
    Abstract: A trace data formatter 30 assembles trace data frames 50. These trace data frames 50 include bytes which may either serve to carry a trace data source identifier ID or trace data. A system being traced has multiple trace data sources 12, 14, 16, 18 and when the trace data source which is generating the current trace data stream changes then a trace data source identifier ID is inserted within the trace data stream.
    Type: Grant
    Filed: November 19, 2003
    Date of Patent: January 29, 2008
    Assignee: ARM Limited
    Inventors: Daryl Wayne Bradley, Sheldon James Woodhouse, Andrew Brookfield Swaine
  • Patent number: 7191293
    Abstract: A trace data system is provided in which flush request signals are generated and passed to trace data sources to trigger them to output any buffered trace data they are storing which was generated prior to the flush request being signalled. When the trace data has been flushed from these trace data sources, they signal this by generating a flush complete signal. The flushing of trace data may advantageously be performed prior to a power-down operation and using a trace bus bridge.
    Type: Grant
    Filed: March 16, 2004
    Date of Patent: March 13, 2007
    Assignee: ARM Limited
    Inventors: Daryl Wayne Bradley, Andrew Brookfield Swaine, Sheldon James Woodhouse, John Michael Horley
  • Patent number: 7165729
    Abstract: Within an integrated circuit 2 independently controllable domains 4, 6, 8, 10, 12, 14 may be unable to complete pending transactions taking place between domains. Each domain is provided with a transaction level state machine 20, 22 which is responsive to the state of the state machine within the other domain and when this indicates that the other domain is not capable of communicating triggers default behavior ensuring that the predetermined transaction protocol is not broken.
    Type: Grant
    Filed: January 31, 2005
    Date of Patent: January 23, 2007
    Assignee: ARM Limited
    Inventors: Daryl Wayne Bradley, Richard Roy Grisenthwaite, Sheldon James Woodhouse