Abstract: Methods and apparatus for transporting a synchronous or plesiochronous signal over a packet network. The methods of the invention include providing incoming and outgoing packet counters at the “local” user-network-interface (UNI) where the packets are to be reassembled into a synchronous or plesiochronous signal. According to the basic method of the invention, the UNI is provided with an adjustable clock and the clock rate is adjusted by comparing the incoming packet count with the outgoing packet count. In particular, if the outgoing packet count is smaller than the incoming packet count, the clock rate is increased. If the outgoing packet count is larger than the incoming packet count, the clock rate is decreased. In order to minimize delay in clock adjustments, a “gear shift” adjustment algorithm is provided. The apparatus of the invention includes a phase locked loop (PLL) embodied in a programmable logic device (PLD).

Abstract: An internal antenna (302) for a wearable electronic device (1000) includes first and second elongated conductor segments (416, 418) which are fabricated in a form of an arc to conform substantially to a portion of a substantially circular housing cavity, and first and second shortened conductor segments (420, 422). The first and second elongated conductor segments (416, 418) and the first and second shortened conductor segments (420, 422) are formed into a single turn loop having a rectangular antenna aperture (436). Connection tabs (424) are formed contiguous with, and located symmetrically about, a midpoint of one of the first and second elongated conductor segments (416, 418) and couple the antenna (302) to a receiver (1104) which is located on a circuit substrate (406) which is positioned between the first and second elongated conductor segments (416, 418).