Patents by Inventor Dave Ayers

Dave Ayers has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6977435
    Abstract: A process flow to make an interconnect structure with one or more thick metal layers under Controlled Collapse Chip Connection (C4) bumps at a die or wafer level. The interconnect structure may be used in a backend interconnect of a microprocessor. The one or more integrated thick metal layers may improve power delivery and reduce mechanical stress to a die at a die/package interface.
    Type: Grant
    Filed: September 9, 2003
    Date of Patent: December 20, 2005
    Assignee: Intel Corporation
    Inventors: Sarah E. Kim, Bob Martell, Dave Ayers, R. Scott List, Peter Moon, Anna M. George, legal representative, Steven Towle, deceased