Patents by Inventor Dave Colleran

Dave Colleran has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080072215
    Abstract: A method and apparatus for parsing signomial and geometric programs, referred to herein as “the Parser”. Signomial and Geometric programming is a unique class of mathematical problems that is useful in the study of optimization problems. The Parser is a program designed to recognize and parse both signomial and geometric programs such that they may be accepted and solved by signomial and geometric program solvers. The Parser accepts an optimization problem from a user in the form of algebraic expressions. The Parser can then identify the problem as a signomial program and can further determine if it reduces to a geometric program. If either a signomial or geometric program exists, the Parser converts the algebraic expressions to a compact numeric format that can be accepted by a computer-aided solver. In the case of a geometric program, the solver may find a global solution to the optimization problem. However, in the case of signomial program, the solver may only find a local solution.
    Type: Application
    Filed: November 19, 2007
    Publication date: March 20, 2008
    Inventors: Stephen Boyd, Xiling Shen, Mar Hershenson, Lieven Vandenberghe, Cesar Crusius, Dave Colleran, Sunderarjan Mohan
  • Patent number: 7304544
    Abstract: A method is described that involves developing a more detailed description of a phase lock loop system by substituting, into a monomial or posynomial equation that is part of a family of monomial and posynomial expressions that describe functional characteristics of the PLL at the system level, a lower level expression that describes a characteristic of one the PLL's basic building blocks.
    Type: Grant
    Filed: March 26, 2004
    Date of Patent: December 4, 2007
    Assignee: Sabio Labs, Inc.
    Inventors: Dave Colleran, Arash Hassibi
  • Patent number: 7299459
    Abstract: A method and apparatus for parsing signomial and geometric programs, referred to herein as “the Parser”. Signomial and Geometric programming is a unique class of mathematical problems that is useful in the study of optimization problems. The Parser is a program designed to recognize and parse both signomial and geometric programs such that they may be accepted and solved by signomial and geometric program solvers. The Parser accepts an optimization problem from a user in the form of algebraic expressions. The Parser can then identify the problem as a signomial program and can further determine if it reduces to a geometric program. If either a signomial or geometric program exists, the Parser converts the algebraic expressions to a compact numeric format that can be accepted by a computer-aided solver. In the case of a geometric program, the solver may find a global solution to the optimization problem. However, in the case of signomial program, the solver may only find a local solution.
    Type: Grant
    Filed: December 29, 2000
    Date of Patent: November 20, 2007
    Assignee: Sabio Labs, Inc.
    Inventors: Stephen Boyd, Xiling Shen, Mar Hershenson, Lieven Vandenberghe, Cesar Crusius, Dave Colleran, Sunderarjan Mohan
  • Publication number: 20040027206
    Abstract: A method is described that involves developing a more detailed description of a phase lock loop system by substituting, into a monomial or posynomial equation that is part of a family of monomial and posynomial expressions that describe functional characteristics of the PLL at the system level, a lower level expression that describes a characteristic of one the PLL's basic building blocks.
    Type: Application
    Filed: April 7, 2002
    Publication date: February 12, 2004
    Inventors: Dave Colleran, Arash Hassibi
  • Publication number: 20030191611
    Abstract: A method for providing a mathematical expression in the form of a posynomial or max-monomial function for a performance metric of an integrated circuit is disclosed. Data representing a plurality of circuit variables is provided and curve fitting occurs to selected ones of the variables. A plurality of expressions may be used and when used, error at the transition from one expression to another is checked. The resultant expressions lend themselves to a global solution with design problems expressed as geometric programs.
    Type: Application
    Filed: April 5, 2002
    Publication date: October 9, 2003
    Inventors: Maria del Mar Hershenson, Dave Colleran, Arash Hassibi