Patents by Inventor Dave Dobuzinsky

Dave Dobuzinsky has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method of forming wires on an integrated circuit chip
    Patent number: 6268293
    Abstract: A damascene method of forming conductive lines in an integrated circuit chip. Trenches are etched by a plasma formed by capacitively coupling a gas mixture at 500 to 3000 watts under a pressure of 50-400 mTorr. The gas mixture includes 2-30 sccm of C4F8, 20-80 sccm of CO, 2-30 sccm of O2 and 50-400 sccm of Ar. Gas flow can be adjusted to an optimum level, thereby achieving a high degree of uniformity. Wafers falling below a selected uniformity may be reworked. A damascene wiring layer formed in the trenches with an acceptable flow exhibit a high degree of sheet resistance uniformity and improved line to line shorts yield.
    Type: Grant
    Filed: November 18, 1999
    Date of Patent: July 31, 2001
    Assignees: International Business Machines Corporation, Infineon Technologies North American Corporation
    Inventors: Lawrence Clevenger, Greg Costrini, Dave Dobuzinsky, Yoichi Otani, Thomas Rupp, Viraj Sardesai