Patents by Inventor Dave M. Brown

Dave M. Brown has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6438706
    Abstract: An error correction arrangement for a flash EEPROM array including a plurality of redundant array circuits, apparatus for sensing when a hardware error has occurred in a block of the flash EEPROM array, and a circuit for replacing an array circuit with a redundant array circuit in response to detection of a hardware error.
    Type: Grant
    Filed: August 23, 2001
    Date of Patent: August 20, 2002
    Assignee: Intel Corporation
    Inventor: Dave M. Brown
  • Publication number: 20020053042
    Abstract: An error correction arrangement for a flash EEPROM array including a plurality of redundant array circuits, apparatus for sensing when a hardware error has occurred in a block of the flash EEPROM array, and a circuit for replacing an array circuit with a redundant array circuit in response to detection of a hardware error.
    Type: Application
    Filed: August 23, 2001
    Publication date: May 2, 2002
    Inventor: Dave M. Brown
  • Patent number: 6330688
    Abstract: An error correction arrangement for a flash EEPROM array including a plurality of redundant array circuits, apparatus for sensing when a hardware error has occurred in a block of the flash EEPROM array, and a circuit for replacing an array circuit with a redundant array circuit in response to detection of a hardware error.
    Type: Grant
    Filed: October 31, 1995
    Date of Patent: December 11, 2001
    Assignee: Intel Corporation
    Inventor: Dave M. Brown
  • Patent number: 6009497
    Abstract: A method for updating the content of EEPROM memory used for controlling processes run on a microprocessor used to control the operations of a long term memory array which includes moving an update process stored in the EEPROM memory to a random access memory associated with the microprocessor; and then using the update process stored in random access memory for erasing the contents of the EEPROM memory, and furnishing data to the microprocessor on a sector by sector basis from a host computer through an interface used by the microprocessor to provide data to the long term memory array. The data furnished by the host is written sector by sector to the EEPROM memory until the EEPROM memory has been updated.
    Type: Grant
    Filed: November 9, 1998
    Date of Patent: December 28, 1999
    Assignee: Intel Corporation
    Inventors: Steven E. Wells, Virgil Niles Kynett, Terry L. Kendall, Richard Garner, Dave M. Brown
  • Patent number: 5835933
    Abstract: A method for updating the content of EEPROM memory used for controlling processes run on a microprocessor used to control the operations of a long term memory array which includes moving an update process stored in the EEPROM memory to a random access memory associated with the microprocessor; and then using the update process stored in random access memory for erasing the contents of the EEPROM memory, and furnishing data to the microprocessor on a sector by sector basis from a host computer through an interface used by the microprocessor to provide data to the long term memory array. The data furnished by the host is written sector by sector to the EEPROM memory until the EEPROM memory has been updated.
    Type: Grant
    Filed: February 19, 1993
    Date of Patent: November 10, 1998
    Assignee: Intel Corporation
    Inventors: Steven E. Wells, Virgil Niles Kynett, Terry L. Kendall, Richard Garner, Dave M. Brown