Patents by Inventor Dave MARSHNIL

Dave MARSHNIL has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Switch bootstrapping for multi-level inductive power converter
    Patent number: 12603573
    Abstract: A multi-level power converter configured to receive a power supply and generate an inductor current may include a first switch coupled to a first capacitor, a second switch coupled to a second capacitor, a third switch coupled to a third capacitor, a fourth switch, an inductor coupled to a switch node between the second switch and the third switch, and a flying capacitor having a first terminal coupled to a first node between the first and second switch and a second terminal coupled to a second node between the third and fourth switch, wherein the second capacitor is configured to share charge with at least one of the first capacitor and the third capacitor to enable non-gate terminals of at least one of the first switch, the second switch, and the third switch to replenish with charge at or approximate to a duty cycle extreme of the multi-level power converter.
    Type: Grant
    Filed: April 5, 2024
    Date of Patent: April 14, 2026
    Assignee: Cirrus Logic Inc.
    Inventors: Graeme G. Mackay, Jin-Jyh Su, Hasnain Akram, Changjong Lim, Dave Marshnil
  • SWITCH BOOTSTRAPPING FOR MULTI-LEVEL INDUCTIVE POWER CONVERTER
    Publication number: 20240356441
    Abstract: A multi-level power converter configured to receive a power supply and generate an inductor current may include a first switch coupled to a first capacitor, a second switch coupled to a second capacitor, a third switch coupled to a third capacitor, a fourth switch, an inductor coupled to a switch node between the second switch and the third switch, and a flying capacitor having a first terminal coupled to a first node between the first and second switch and a second terminal coupled to a second node between the third and fourth switch, wherein the second capacitor is configured to share charge with at least one of the first capacitor and the third capacitor to enable non-gate terminals of at least one of the first switch, the second switch, and the third switch to replenish with charge at or approximate to a duty cycle extreme of the multi-level power converter.
    Type: Application
    Filed: April 5, 2024
    Publication date: October 24, 2024
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Graeme G. MACKAY, Jin-Jyh SU, Hasnain AKRAM, Changjong LIM, Dave MARSHNIL