Patents by Inventor Dave Stacey
Dave Stacey has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10153843Abstract: Computer-implemented systems and methods for visually presenting spectrum usage of optical spectrum in an optical network include obtaining spectrum data which defines spectrum usage of optical spectrum associated with the optical network including a plurality of nodes interconnected by a plurality of links; and displaying a circular histogram to visually illustrate the spectrum usage based on the spectrum data, wherein each segment of the circular histogram represents an associated portion of the optical spectrum and a visual indicator in each segment represents usage of the associated portion.Type: GrantFiled: May 29, 2018Date of Patent: December 11, 2018Assignee: Ciena CorporationInventors: Simon Brueckheimer, Dave Stacey, Benoît Châtelain
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Publication number: 20180278330Abstract: Computer-implemented systems and methods for visually presenting spectrum usage of optical spectrum in an optical network include obtaining spectrum data which defines spectrum usage of optical spectrum associated with the optical network including a plurality of nodes interconnected by a plurality of links; and displaying a circular histogram to visually illustrate the spectrum usage based on the spectrum data, wherein each segment of the circular histogram represents an associated portion of the optical spectrum and a visual indicator in each segment represents usage of the associated portion.Type: ApplicationFiled: May 29, 2018Publication date: September 27, 2018Inventors: Simon Brueckheimer, Dave Stacey, Benoît Châtelain
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Patent number: 10009105Abstract: Computer-implemented systems and methods for visually presenting spectrum usage of optical spectrum in an optical network include displaying a network map of the optical network comprising a plurality of nodes and a plurality of links connecting the plurality of nodes to one another; responsive to obtaining spectrum data comprising channel assignments on the plurality of links and nodes as endpoints of the associated channel assignments, displaying a plurality of circular histograms to visually illustrate spectrum usage in the optical network; and adjusting the plurality of circular histograms based on selections of a plurality of endpoints in the optical network. The plurality of circular histograms visually represent the spectrum usage by representing the optical spectrum in the optical network around the associated circular histogram, and wherein each portion or segment of the plurality of circular histograms represents one of a wavelength and a portion of spectrum.Type: GrantFiled: December 6, 2016Date of Patent: June 26, 2018Assignee: Ciena CorporationInventors: Simon Brueckheimer, Dave Stacey, Benoît Châtelain
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Publication number: 20170353243Abstract: Computer-implemented systems and methods for visually presenting spectrum usage of optical spectrum in an optical network include displaying a network map of the optical network comprising a plurality of nodes and a plurality of links connecting the plurality of nodes to one another; responsive to obtaining spectrum data comprising channel assignments on the plurality of links and nodes as endpoints of the associated channel assignments, displaying a plurality of circular histograms to visually illustrate spectrum usage in the optical network; and adjusting the plurality of circular histograms based on selections of a plurality of endpoints in the optical network. The plurality of circular histograms visually represent the spectrum usage by representing the optical spectrum in the optical network around the associated circular histogram, and wherein each portion or segment of the plurality of circular histograms represents one of a wavelength and a portion of spectrum.Type: ApplicationFiled: December 6, 2016Publication date: December 7, 2017Inventors: Simon BRUECKHEIMER, Dave STACEY, Benoît CHÂTELAIN
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Patent number: 7366175Abstract: A packet scheduler controls dispatch of packets containing constant bit rate (CBR) or real time variable bit rate (rt-VBR) at an ingress operation of multiplexing the packets into payloads of an asynchronous transfer mode (ATM) bearer virtual circuit connection. Packets can be queued in one of a number of queues according to priority. The scheduler controls assembly of common part sublayer payload data units (CPS-PDU) comprising any unused octets from a previous packet partially dispatched, and whole packets in order of priority. If a holdover timer period expires before a common part sublayer payload data unit is completed, the payload of that data unit is packed with null data; and dispatched. The packet dispatch is controlled so as to match the traffic characteristics of an underlying bearer channel.Type: GrantFiled: September 19, 2003Date of Patent: April 29, 2008Assignee: Nortel Networks LimitedInventors: Dave Stacey, Fai Tsang, Simon Brueckheimer
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Patent number: 7139278Abstract: In a packet communications network system, a border gateway protocol is employed to route an information packet from a source in a first autonomous system via a first label switched path to a destination in a second autonomous system via first and second border routers at an interface between the first and second autonomous systems. A label stack attached to the packet identifies both a forwarding interface for the packet and a forwarding behaviour at that interface. This provides a mapping from the first label switched path on to a second label switched path to the destination in the second autonomous system. Preferably, the destination router in the second autonomous system returns to the source router in the first autonomous system a two-label stack identifying first and second paths across the first and second autonomous systems respectively.Type: GrantFiled: December 21, 2001Date of Patent: November 21, 2006Assignee: Nortel Networks LimitedInventors: Mark Gibson, Roy Mauger, Dave Stacey
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Patent number: 7046669Abstract: A label switched path is determined in a communications multi-service network comprising a plurality of nodes interconnected via quality of service capable tunnels to provide a QoS guarantee for a session in which resource availability from the network edge to multiple central stages and resource availability from the multiple central stages to the destination edge are established. A series of quality of service capable tunnels is selected by offering a plurality of candidate central stages to the destination edge and allowing the destination edge to select a complete path across the network. A label stack comprising a set of four labels is attached to a payload to define a selected sequence of tunnels.Type: GrantFiled: June 28, 2000Date of Patent: May 16, 2006Assignee: Nortel Networks LimitedInventors: Roy Mauger, Dave Stacey, Mark Gibson
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Patent number: 6985447Abstract: Label switched paths are installed in a label switched communications packet network. Paths are selected by defining and installing partial routes each having two or more paths such that an end-to-end route across the network can be defined as the concatenation of two partial routes. Signalling to select a path is effected by sending a path message from an end point to a first virtual router, determining a path from the end point to the virtual router, and forwarding an identity of the path to a second virtual router. The second virtual router determines a routing vector across the network, and returns information identifying the routing vector to the first virtual router.Type: GrantFiled: December 29, 2000Date of Patent: January 10, 2006Assignee: Nortel Networks LimitedInventors: Mark Gibson, Roy Mauger, Dave Stacey, Robert Friskney
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Publication number: 20050063388Abstract: A packet scheduler controls dispatch of packets containing constant bit rate (CBR) or real time variable bit rate (rt-VBR) at an ingress operation of multiplexing the packets into payloads of an asynchronous transfer mode (ATM) bearer virtual circuit connection. Packets can be queued in one of a number of queues according to priority. The scheduler controls assembly of common part sublayer payload data units (CPS-PDU) comprising any unused octets from a previous packet partially dispatched, and whole packets in order of priority. If a holdover timer period expires before a common part sublayer payload data unit is completed, the payload of that data unit is packed with null data; and dispatched.Type: ApplicationFiled: September 19, 2003Publication date: March 24, 2005Inventors: Dave Stacey, Fai Tsang, Simon Brueckheimer
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Patent number: 6834053Abstract: A traffic scheduler controls despatch of assembled packets or cells at an adaptation interface of an asynchronous transfer mode (ATM) network supporting a plurality of ATM traffic classes on two or more ATM adaptation layers. The scheduler comprising a distributed hierarchy of individual traffic schedulers one or more at each layer of the hierarchy each dedicated to its own traffic class. An aggregate traffic output at one layer in the hierarchy forms an input to the next layer. The lower level layers of the hierarchy are incorporated in a common part sublayer device and provide feedback to higher layers to control the flow of traffic during periods of congestion.Type: GrantFiled: October 27, 2000Date of Patent: December 21, 2004Assignee: Nortel Networks LimitedInventors: Dave Stacey, Fai Tsang, Simon Brueckheimer
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Patent number: 6733829Abstract: A deposition ring which has a cut out on its interior circumferential edge. The deposition ring is configured to contact an edge of an electrostatic chuck and shield at least a portion of the electrostatic chuck during a deposition process wherein material is deposited onto an item, such as a semiconductor wafer, which is disposed on the electrostatic chuck. The interior circumferential edge of the deposition ring includes a surface portion which is configured to engage the edge of the electrostatic chuck, and includes the cut out portion which is configured to be spaced away and not contact the edge of the electrostatic chuck during the deposition process. As such, the deposition ring does not tend to bind with the electrostatic chuck during the deposition process.Type: GrantFiled: March 19, 2002Date of Patent: May 11, 2004Assignee: LSI Logic CorporationInventors: Dave Stacey, Jonathan Allinger, Allan Vescovi
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Patent number: 6728254Abstract: A memory architecture for multiple inputs comprises a common memory structure having a plurality of data locations for storing data units and an input section for providing a plurality of input ports with access to the common memory structure. The input section includes a memory buffer for each input port which can store a number of data units equal to the number of input ports, and a bus allowing each memory buffer to write a plurality of data units across the memory structure at least once during a memory-access cycle. The common memory structure includes a number of memory banks equal to the number of input ports. This structure enables the memory banks to be implemented as low speed devices. The memory architecture is suitable for use in ATM system components.Type: GrantFiled: October 4, 1999Date of Patent: April 27, 2004Assignee: Nortel Networks LimitedInventors: Dave Stacey, Fai Tsang, Simon Brueckheimer
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Patent number: 6654376Abstract: A packet scheduler controls dispatch of packets containing constant bit rate (CBR) or real time variable bit rate (rt-VBR) at an ingress operation of multiplexing the packets into payloads of an asynchronous transfer mode (ATM) bearer virtual circuit connection. Packets can be queued in one of a number of queues according to priority. The scheduler controls assembly of common part sublayer payload data units (CPS-PDU) comprising any unused octets from a previous packet partially dispatched, and whole packets in order of priority. If a holdover timer period expires before a common part sublayer payload data unit is completed, the payload of that data unit is packed with null data; and dispatched. The packet dispatch is controlled so as to match the traffic characteristics of an underlying bearer channel.Type: GrantFiled: December 28, 1999Date of Patent: November 25, 2003Assignee: Nortel Networks LimitedInventors: Dave Stacey, Fai Tsang, Simon Brueckheimer
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Publication number: 20030177981Abstract: A deposition ring which has a cut out on its interior circumferential edge. The deposition ring is configured to contact an edge of an electrostatic chuck and shield at least a portion of the electrostatic chuck during a deposition process wherein material is deposited onto an item, such as a semiconductor wafer, which is disposed on the electrostatic chuck. The interior circumferential edge of the deposition ring includes a surface portion which is configured to engage the edge of the electrostatic chuck, and includes the cut out portion which is configured to be spaced away and not contact the edge of the electrostatic chuck during the deposition process. As such, the deposition ring does not tend to bind with the electrostatic chuck during the deposition process.Type: ApplicationFiled: March 19, 2002Publication date: September 25, 2003Inventors: Dave Stacey, Jonathan Allinger, Allan Vescovi
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Publication number: 20030118036Abstract: In a packet communications network system, a border gateway protocol is employed to route an information packet from a source in a first autonomous system via a first label switched path to a destination in a second autonomous system via first and second border routers at an interface between the first and second autonomous systems. A label stack attached to the packet identifies both a forwarding interface for the packet and a forwarding behaviour at that interface. This provides a mapping from the first label switched path on to a second label switched path to the destination in the second autonomous system. Preferably, the destination router in the second autonomous system returns to the source router in the first autonomous system a two-label stack identifying first and second paths across the first and second autonomous systems respectively.Type: ApplicationFiled: December 21, 2001Publication date: June 26, 2003Inventors: Mark Gibson, Roy Mauger, Dave Stacey
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Publication number: 20020085559Abstract: Label switched paths are installed in a label switched communications packet network. Paths are selected by defining and installing partial routes each comprising two or more paths such that an end-to-end route across the network can be defined as the concatenation of two partial routes. Signalling to select a path is effected by sending a path message from an end point to a first virtual router, determining a path from the end point to the virtual router, and forwarding an identity of the path to a second virtual router. The second virtual router determines a routing vector across the network, and returns information identifying the routing vector to the first virtual router.Type: ApplicationFiled: December 29, 2000Publication date: July 4, 2002Inventors: Mark Gibson, Roy Mauger, Dave Stacey, Robert Friskney