Abstract: Methods, systems, and devices for suspending operations of a memory system are described. A memory system may be configured to perform a write operation to store data in a nonvolatile memory device, where the write operation includes storing information in one or more latches associated with the nonvolatile memory device; receive a suspend command to suspend performance of the write operation based on a request to perform a read operation associated with a higher-priority than the write operation; suspend the performance of the write operation based on receiving the suspend command; transmit the information stored in the one or more latches associated with the nonvolatile memory device to a host system based on suspending the performance of the write operation; and perform the read operation based at least in part on transmitting the information to the host system.

Abstract: A method for determining amounts of material to add to a mixture of agricultural materials to be applied to a field based on an area of a field yet to be applied or how much material can be added to a storage tank.

Abstract: Provided are scalable, parallelized microfluidic chips that include arrays of microfluidic mixing channels for large-scale production of lipid nanoparticles, among other products. The disclosed chips can operate with a single set of inlets and outlet, and achieve production rates in excess of those achieved by existing methods. The disclosed devices provide large-scale production of formulations while still maintaining the physical properties and potency typical of existing methods of producing such formulations. Also provided are related methods of using the disclosed devices.

Abstract: Methods, systems, and devices for improving write quality in memory systems are described. The memory system may receive, from a host system, a command to perform an operation. The memory system may determine an availability parameter that indicates processing resources of the memory system that are available to perform the operation based on receiving the command. In some cases, the memory system may transmit, to the host system, a message comprising the availability parameter, and the host system may delay transmission of one or more pending commands based on receiving the message comprising the availability parameter.

Abstract: Wire-based metallization and stringing techniques for solar cells, and the resulting solar cells, modules, and equipment, are described. In an example, a substrate has a surface. A plurality of N-type and P-type semiconductor regions is disposed in or above the surface of the substrate. A conductive contact structure is disposed on the plurality of N-type and P-type semiconductor regions. The conductive contact structure includes a plurality of conductive wires, each conductive wire of the plurality of conductive wires essentially continuously bonded directly to a corresponding one of the N-type and P-type semiconductor regions.

Abstract: A receptacle delivery system that includes a rail extending between first and second locations of an instrument and a carriage configured to move on the rail between the first and second locations of the instrument. The carriage includes a bracket having opposed first and second sidewalls and a base extending between the first and second sidewalls, where the carriage is configured to support a receptacle. The carriage further includes a pair of opposed support pads, where the pair of support pads are configured to (a) move toward a receptacle supported by the carriage as the carriage moves from the first location toward the second location, and (b) move away from a receptacle supported by the carriage as the carriage moves from the second location toward the first location. The carriage also includes a pair of meshed cam gears rotatably coupled to the first sidewall, where each cam gear is coupled to a different one of the support pads.

Abstract: Methods, systems, and devices for low-power boot-up for memory systems are described. A memory system may be configured to receive, over a first conductive path of a second communication interface, a first indication to boot-up a memory system and a first communication interface associated with the memory system, wherein the first communication interface includes a plurality of conductive paths; receive, over a second conductive path of the second communication interface, a second indication whether to perform a boot-up operation of the memory system using a low-power mode or a high-power mode based at least in part on receiving the first indication; and boot the memory system according to the low-power mode or the high-power mode based at least in part on receiving the second indication.

Abstract: A method of performing a lab developed test for detecting a nucleic acid analyte on an automated analyzer. The method includes a first step of using a computer to select, define or modify one or more user-defined parameters of a protocol for performing the lab developed test on the analyzer, where each user-defined parameter of the protocol defines a step to be performed by the analyzer during the lab developed test. The method further includes a second step of performing the lab developed test with the protocol of the first step, where the analyzer stores one or more system-defined parameters for performing the lab developed test, the one or more system-defined parameters being installed on the analyzer prior to performing first step.

Abstract: Various examples are directed to devices and methods involving a host device and a memory system, the memory system comprising a memory controller and a plurality of memory locations. The memory system may send to the host device a first message describing background operations to be performed at the memory system. The memory system may receive from the host device a second message indicating permission to execute the background operations and may begin to execute at least one background operation.

Abstract: A method for performing seamless relocation of a mobile terminal in a wireless network includes selecting a first serving gateway (SGW) among a plurality of SGWs and a first packet data network gateway (PGW) among a plurality of PGWs, wherein the first SGW connects to the first PGW to setup the first S5 session, establishing a first communication channel between the terminal and the first PGW and assigning an internet protocol (IP) address to the terminal, selecting a second SGW among the plurality of SGWs when the terminal is about to move out of an area being served by the first SGW, connecting the second SGW to the second PGW to setup a new S5 session when a second PGW among the plurality of PGWs is closer to the second SGW than the first PGW or connecting the second SGW to the first PGW to modify the first S5 session when no PGW is closer to the second SGW than the first PGW, establishing a second communication channel between the terminal and the second SGW using the IP address allocated to the terminal,

Abstract: Provided herein are SOS1 protein degraders, for example, a compound of Formula (I), and pharmaceutical compositions thereof. Also provided herein are methods of their use for treating, preventing, or ameliorating one or more symptoms of an SOS1-mediated disorder, disease, or condition.

Abstract: Apparatus and methods are disclosed, including using a memory controller to partition a memory array into a first portion and a second portion, the first portion and second portion having non-overlapping logical block addressing (LBA) ranges. The memory controller assigns a first granularity of a first logical-to-physical (L2P) mapping table entry for the first portion of the memory array designated for a first usage, and a second granularity of a second L2P mapping table entry for the second portion of the memory array designated for a second usage, where the second granularity is not equal to the first granularity. The memory controller stores the first granularity and the second granularity in the memory array, and stores at least a portion of the first L2P mapping table entry and the second L2P mapping table entry in an L2P cache of the memory controller.

Abstract: An embodiment provides techniques for distinguishing between breathing events based on sensor data obtained from one or more wearable sensors. In one example, sensor data is obtained that includes one or more of a sensor signal and descriptive metadata of the sensor signal. Processing is applied to distinguish between a cough and another breathing event based on the sensor data, and an indication of a cough is provided.

Abstract: Systems and methods for adapting garbage collection (GC) operations in a memory device to a host write activity are described. A host write progress can be represented by an actual host write count relative to a target host write count. The host write activity may be estimated in a unit time such as per day, or accumulated over a specified time period. A memory controller can adjust an amount of memory space to be freed by a GC operation according to the host write progress. The memory controller can also dynamically reallocate a portion of the memory cells between a single level cell (SLC) cache and a multi-level cell (MLC) storage according to the host write progress.

Abstract: Methods, systems, and devices for power control for boot-up of memory systems are described. A memory system may be configured to boot-up using two different power modes: a lower-power mode, and a higher-power mode. The memory system may perform a series of evaluations to determine whether the memory system is to switch to the lower-power mode during boot-up operations, or stay in the higher-power mode. For example, the memory system may check one or more of: a history of previous boot-up failures, a voltage of an associated power management integrated circuit, a history of asynchronous power loss at the device, a power-mode configuration of the host device, or a history of host-initiated power-down commands. In some examples, by switching to the lower-power mode, the memory system may avoid repeatedly failing multiple boot-up cycles and may instead successfully boot-up the memory system.

Abstract: Methods, systems, and devices for adjusting a granularity associated with read disturb tracking are described. In some examples, a memory system may receive a set of read commands from a host system instructing the memory system to read data stored at a memory array. The memory system may track a quantity of executed read commands corresponding to a first portion of the memory array according to a first granularity and determine whether the quantity of read commands satisfies a threshold. If the quantity of read commands satisfies the threshold, the memory system may adjust the granularity for tracking executed read commands for the first portion from the first granularity to a second granularity. For example, the memory system may increase or decrease the granularity for tracking executed read commands for the first portion. The memory system may use the tracked quantities of executed read commands for read disturb remediation.

Abstract: The present invention relates to supramolecular surfactants (SS) with detergent-dispersant of heavy organic compounds (deposits and/or organic scales) and corrosion inhibition properties, and methods for preparing these surfactants. The invention also relates to the corresponding uses and applications of these surfactants to prevent and control the formation of deposits in internal combustion machines, as well as to prevent and protect pipelines, tanks, motors and complements of ferrous materials against corrosion where there is contact with liquid hydrocarbons such as gasoline, turbosine, and diesel, where gasoline may contain oxygenated compounds such as ethers and/or alcohols. The supramolecular surfactants are obtained from the self-assembly process between oxazolidines derived from polyalkyl/polyalkenyl N-hydroxyalkyl succinimides with alkyl/alkenyl-amine-propanoic acids and alkyl/alkenyl-amine-di-propanoic acids.

Abstract: A phosphate-free automatic dishwashing cleaning composition comprising i) a protease wherein the protease is a variant having at least 60% identity with the amino acid sequence of SEQ ID NO:1 and comprising at least one amino acid substitution (using the SEQ ID NO: 1 numbering) selected from the group consisting of X54T; X126A, D, G, V, E, K, I; X127E, S, T, A, P, G, C; and X128E, C, T, D, P, G, L, Y, N; and ii) from 10 to 50% by weight of the composition of a complexing agent system comprising from 0 to less than 30% by weight of the composition of citric acid.

Abstract: A method of performing a fund transfer at an ATM includes receiving an active authentication transaction key at an ATM from a mobile financial transaction instrument via a wireless communication protocol, generating a PIN at the ATM, and storing the PIN in a machine readable storage medium. An authorization request message is transmitted to a financial institution identified by the active authentication transaction key. The authorization request message includes the PIN and at least a portion of the active authentication transaction key. The PIN is received from a user of the mobile financial transaction instrument, and the funds are dispensed in response to receiving the PIN.

Abstract: A sample processing station includes two or more container holders on a platform that is rotatable about a central axis of rotation. Each holder is configured to rotate about a secondary axis of rotation. The station includes a capping/decapping mechanism to cap or decap a container held in one of the container holders and an elevator with a chuck guide that contact the container holder as the chuck is lowered by the elevator to positon the chuck with respect to the cap of the container held in the holder and to hold jaws of the container holder in a closed position. In embodiment, the chuck guide includes a yoke with opposed arms and spindles located near distal ends of the arms that engage beveled shoulders of the container holder.