Abstract: Methods and apparatus for a centrifuge motor, which are particularly suited for measuring and calculating the back EMF coefficient (Ke) of the motor and motor temperature.

Abstract: A system is disclosed for storing content received from a data communications network. The system includes at least one physical memory device for implementing a cache memory and a cache memory manager responsive to content received from at least two sources for associating an identifier with content stored in the at least one physical memory device that distinguishes content received from a first source from content received from a second source. The cache memory manager is further responsive to the identifiers for performing at least one cache management function differently for the content received from the first source than for the content received from the second source. In a mobile station embodiment that includes a HTTP browser the invention permits HTTP content received from a wireless network operator to be stored and managed separately from other received HTTP content.

Abstract: Systems and methods for sensing the temperature of the rotor magnets of an electric motor are provided to facilitate the determination of motor performance characteristics such as the torque of the rotor.

Abstract: Systems and methods for sensing the temperature of the rotor magnets of an electric motor are provided to facilitate the determination of motor performance characteristics such as the torque of the rotor.

Abstract: Kinetic energy of a rotor is substantially prevented from exceeding a predetermined amount of kinetic energy by determining a first kinetic energy of the rotor spinning at a first rotational velocity and determining whether the first kinetic energy exceeds the predetermined amount of kinetic energy. In addition, torque being applied to the rotor is modulated in response to the first kinetic energy exceeding the predetermined amount of kinetic energy. In this manner, the rotor is spun at a relatively slower rotational velocity than the first rotational velocity.

Abstract: Controlling the torque of a motor by driving a centrifuge rotor connected to the motor; increasing a motor torque of the motor to a specified level; detecting revolutions per minute of the centrifuge rotor; adjusting the motor torque based on detected revolutions per minute; decreasing the motor torque to a constant torque over a range of revolutions per minute; and increasing the motor torque when the detected revolutions per minute are outside of the range.

Abstract: A multi-processor system includes an interrupt bus used for arbitrating among eligible processors to determine which processor is to service of an interrupt request. The interrupt bus comprises wired-OR connection data lines that are used for arbitration. A local interrupt controller that handles the acceptance of interrupt request messages on the interrupt bus is associated with each processor. To minimize interruption of high priority tasks, interrupts can be accepted by the processor in the system that is currently running the lowest priority task. An arbitration protocol governs the interrupt bus and determines the lowest priority processor. The arbitration protocol includes choosing one among the lowest priority processors by means of a random priority scheme that uses an arbitration ID that is updated with each message.

Abstract: A multi-processor programmable interrupt controller system that includes: an I/O interrupt controller for receiving interrupt requests from an I/O subsystem; multiple processor interrupt controllers, each associated with a specific processor for dispensing of accepted interrupts; and an interrupt controller bus primarily for the transmission of interrupt requests between interrupt controller units and for bus and priority arbitration, using a standard message format and arbitration protocol. The system is implemented, in part, by incorporating the processor interrupt controller with its associated processor into a single integrated circuit. The common system bus which normally carries all system traffic is not used for interrupt request messages. The interrupt controller bus is used for this purpose and thus results in a more efficient system by relieving the system bus of interrupt service requests and the related interrupt request traffic.

Abstract: A multi-processor system includes an interrupt bus used for arbitrating among eligible processors to determine which processor is to service of an interrupt request. The interrupt bus comprises wired-OR connection data lines that are used for arbitration. A local interrupt controller that handles the acceptance of interrupt request messages on the interrupt bus is associated with each processor. To minimize interruption of high priority tasks, interrupts can be accepted by the processor in the system that is currently running the lowest priority task. An arbitration protocol governs the interrupt bus and determines the lowest priority processor. The arbitration protocol includes choosing one among the lowest priority processors by means of a random priority scheme that uses an arbitration ID that is updated with each message.

Abstract: A multi-processor programmable interrupt controller system that includes: an I/O interrupt controller for receiving interrupt requests from an I/O subsystem; multiple processor interrupt controllers, each associated with a specific processor for dispensing of accepted interrupts; and an interrupt controller bus primarily for the transmission of interrupt requests between interrupt controller units and for bus and priority arbitration, using a standard message format and arbitration protocol. The system is implemented, in part, by incorporating the processor interrupt controller with its associated processor into a single integrated circuit. The common system bus which normally carries all system traffic is not used for interrupt request messages. The interrupt controller bus is used for this purpose and thus results in a more efficient system by relieving the system bus of interrupt service requests and the related interrupt request traffic.