Patents by Inventor David A. Crow

David A. Crow has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7957826
    Abstract: A method for fabricating parts using a photolithography system, includes: performing a search of normalization data for an estimated dose operating point; and using the estimated dose operating point for fabrication of new parts.
    Type: Grant
    Filed: August 21, 2007
    Date of Patent: June 7, 2011
    Assignee: International Business Machines Corporation
    Inventors: Christopher P. Ausschnitt, Richard H. Broberg, David A. Crow, William A. Muth, Keith E. Roberts
  • Publication number: 20090053627
    Abstract: A method for fabricating parts using a photolithography system, includes: performing a search of normalization data for an estimated dose operating point; and using the estimated dose operating point for fabrication of new parts. Other methods are provided.
    Type: Application
    Filed: August 21, 2007
    Publication date: February 26, 2009
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Christopher P. Ausschnitt, Richard H. Broberg, David A. Crow, William A. Muth, Keith E. Roberts
  • Patent number: 6518591
    Abstract: Methods for monitoring defects in a process for forming a contact hole, via or trench in a layer of a device in an integrated circuit includes the steps of forming a sacrificial topology on a substrate by duplicating at least a portion of a structure of the device while substituting a material substantially free of elemental silicon for any elemental silicon present in the device to be monitored, etching the sacrificial topology at least to the substrate, removing at least a portion of the sacrificial topology, and inspecting the substrate using a wafer surface inspection tool. The substituted material, such as a dielectric material, can be easily etched and removed from the substrate, as compared to polysilicon. The etching step preferably creates an indentation in the substrate that is readily detectable by the wafer surface inspection tool. The etching step is preferably a selective etching step, having a selectivity of at least 10:1.
    Type: Grant
    Filed: April 28, 2000
    Date of Patent: February 11, 2003
    Assignee: Cypress Semiconductor Corporation
    Inventors: Edward M. Shamble, Thomas Boonstra, David J. Brownell, David A. Crow
  • Patent number: 6121156
    Abstract: Methods for monitoring defects in a process for forming a contact hole, via or trench in a layer of a device in an integrated circuit includes the steps of forming a sacrificial topology on a substrate by duplicating at least a portion of a structure of the device while substituting a material substantially free of elemental silicon for any elemental silicon present in the device to be monitored, etching the sacrificial topology at least to the substrate, removing at least a portion of the sacrificial topology, and inspecting the substrate using a wafer surface inspection tool. The substituted material, such as a dielectric material, can be easily etched and removed from the substrate, as compared to polysilicon. The etching step preferably creates an indentation in the substrate that is readily detectable by the wafer surface inspection tool. The etching step is preferably a selective etching step, having a selectivity of at least 10:1.
    Type: Grant
    Filed: December 2, 1998
    Date of Patent: September 19, 2000
    Assignee: Cypress Semiconductor Corporation
    Inventors: Edward M. Shamble, Thomas Boonstra, David J. Brownell, David A. Crow