Patents by Inventor David A. Lacey

David A. Lacey has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200319861
    Abstract: A method for generating an executable program to run on one or more processor modules. The method comprises: receiving a graph comprising a plurality of data nodes, compute vertices and edges; and compiling the graph into an executable program including one or more types of multi-access instruction each of which performs at least two memory access (load and/or store) operations in a single instruction. The memory on each processor module comprises multiple memory banks whereby the same bank cannot be accessed by different load or store operations in the same instruction. The compilation comprises assigning instances of the multi-access instructions to implement at least some of the graph edges, and allocating the data to memory addresses within different ones of the banks. The allocating is performed subject to one or more constraints, including at least that different load/store operations should not access the same memory bank in the same instruction.
    Type: Application
    Filed: July 31, 2019
    Publication date: October 8, 2020
    Inventors: David Lacey, Godfrey Da Costa
  • Publication number: 20200264856
    Abstract: A method for generating a program to run on multiple tiles. The method comprises: receiving an input graph comprising data nodes, compute vertices and edges; receiving an initial tile-mapping specifying which data nodes and vertices are allocated to which tile; and determining a subgraph of the input graph that meets one or more heuristic rules. The rules comprises: the subgraph comprises at least one data node, the subgraph spans no more than a threshold number of tiles in the initial tile-mapping, and the subgraph comprises at least a minimum number of edges outputting to one or more vertices on one or more other tiles. The method further comprises adapting the initial mapping to migrate the data nodes and any vertices of the determined subgraph to said one or more other tiles.
    Type: Application
    Filed: May 4, 2020
    Publication date: August 20, 2020
    Inventors: Mark Lloyd Pupilli, David Lacey
  • Publication number: 20200218523
    Abstract: A method for generating a program to run on multiple tiles. The method comprises: receiving an input graph comprising data nodes, compute vertices and edges; receiving an initial tile-mapping specifying which data nodes and vertices are allocated to which tile; and determining a subgraph of the input graph that meets one or more heuristic rules. The rules comprises: the subgraph comprises at least one data node, the subgraph spans no more than a threshold number of tiles in the initial tile-mapping, and the subgraph comprises at least a minimum number of edges outputting to one or more vertices on one or more other tiles. The method further comprises adapting the initial mapping to migrate the data nodes and any vertices of the determined subgraph to said one or more other tiles, and compiling the executable program from the graph with the vertices and data nodes allocated by the adapted mapping.
    Type: Application
    Filed: February 15, 2019
    Publication date: July 9, 2020
    Applicant: Graphcore Limited
    Inventors: Mark Lloyd Pupilli, David Lacey
  • Patent number: 10691432
    Abstract: A method for generating a program to run on multiple tiles. The method comprises: receiving an input graph comprising data nodes, compute vertices and edges; receiving an initial tile-mapping specifying which data nodes and vertices are allocated to which tile; and determining a subgraph of the input graph that meets one or more heuristic rules. The rules comprises: the subgraph comprises at least one data node, the subgraph spans no more than a threshold number of tiles in the initial tile-mapping, and the subgraph comprises at least a minimum number of edges outputting to one or more vertices on one or more other tiles. The method further comprises adapting the initial mapping to migrate the data nodes and any vertices of the determined subgraph to said one or more other tiles, and compiling the executable program from the graph with the vertices and data nodes allocated by the adapted mapping.
    Type: Grant
    Filed: February 15, 2019
    Date of Patent: June 23, 2020
    Assignee: Graphcore Limited
    Inventors: Mark Lloyd Pupilli, David Lacey
  • Publication number: 20200150713
    Abstract: The invention relates to a computer implemented method of generating multiple programs to deliver a computerised function, each program to be executed in a processing unit of a computer comprising a plurality of processing units each having instruction storage for holding a local program, an execution unit for executing the local program and data storage for holding data, a switching fabric connected to an output interface of each processing unit and connectable to an input interface of each processing unit by switching circuitry controllable by each processing unit, and a synchronisation module operable to generate a synchronisation signal, the method comprising: generating a local program for each processing unit comprising a sequence of executable instructions; determining for each processing unit a relative time of execution of instructions of each local program whereby a local program allocated to one processing unit is scheduled to execute with a predetermined delay relative to a synchronisation signal
    Type: Application
    Filed: January 16, 2020
    Publication date: May 14, 2020
    Inventors: Simon Christian Knowles, Daniel John Pelham Wilkinson, Richard Luke Southwell Osborne, Alan Graham Alexander, Stephen Felix, Jonathan Mangnall, David Lacey
  • Publication number: 20200012537
    Abstract: A system comprising: a first subsystem comprising one or more first processors, and a second subsystem comprising one or more second processors. The second subsystem is configured to process code over a series of steps delineated by barrier synchronizations, and in a current step, to send a descriptor to the first subsystem specifying a value of each of one or more parameters of each of one or more interactions that the second subsystem is programmed to perform with the first subsystem via an inter-processor interconnect in a subsequent step. The first subsystem is configured to execute a portion of code to perform one or more preparatory operations, based on the specified values of at least one of the one or more parameters of each interaction as specified by the descriptor, to prepare for said one or more interactions prior to the barrier synchronization leading into the subsequent phase.
    Type: Application
    Filed: August 13, 2019
    Publication date: January 9, 2020
    Inventors: David Lacey, Daniel John Pelham Wilkinson, Richard Luke Southwell Osborne, Matthew David Fyles
  • Publication number: 20200012536
    Abstract: A system comprising: a first subsystem comprising one or more first processors, and a second subsystem comprising one or more second processors. The second subsystem is configured to process code over a series of steps delineated by barrier synchronizations, and in a current step, to send a descriptor to the first subsystem specifying a value of each of one or more parameters of each of one or more interactions that the second subsystem is programmed to perform with the first subsystem via an inter-processor interconnect in a subsequent step. The first subsystem is configured to execute a portion of code to perform one or more preparatory operations, based on the specified values of at least one of the one or more parameters of each interaction as specified by the descriptor, to prepare for said one or more interactions prior to the barrier synchronization leading into the subsequent phase.
    Type: Application
    Filed: February 15, 2019
    Publication date: January 9, 2020
    Applicant: Graphcore Limited
    Inventors: David Lacey, Daniel John Pelham Wilkinson, Richard Luke Southwell Osborne, Matthew David Fyles
  • Patent number: 10496086
    Abstract: A method for determining gas turbine engine fleet performance deterioration includes receiving data indicative of deterioration parameter values for a plurality of gas turbine engines. The method also includes determining an average deterioration parameter value for each gas turbine engine at a plurality of intervals, and further determining an individual engine slope between the average deterioration parameter value at each adjacent interval for each gas turbine engine. The method also includes determining a fleet average slope between each adjacent interval based on the individual engine slopes between each adjacent interval, the determined fleet average slopes being usable to determine a performance deterioration of a gas turbine engine in the fleet.
    Type: Grant
    Filed: December 12, 2016
    Date of Patent: December 3, 2019
    Assignee: General Electric Company
    Inventors: Carlos Jose Garciamoreno, Juan Pablo Arroyo, David Lacey Doel, Tim Horejs, Pablo Ochoa
  • Patent number: 10464745
    Abstract: System and method of managing waste at waste transfer stations. Open faced bins allow human entry for sorting, segregation or quarantining waste before it is moved to or mixed with bulk waste stations. Bins are located in covered or uncovered bays located away from waste stations. Stops and guides for precise and safe placement of bins in bays are provided. Bins have quick hitch connection points. To collect, store and redirect leachates in bins, a liquid capture zone and drain hole is provided. Bay design prevents public access to machine areas and adjacent bays.
    Type: Grant
    Filed: November 2, 2015
    Date of Patent: November 5, 2019
    Inventor: Brian Jason David Lacey
  • Publication number: 20190155328
    Abstract: The invention relates to a computer comprising: a plurality of processing units each having instruction storage holding a local program, an execution unit executing the local program, data storage for holding data; an input interface with a set of input wires, and an output interface with a set of output wires; a switching fabric connected to each of the processing units by the respective set of output wires and connectable to each of the processing units by the respective input wires via switching circuitry controllable by each processing unit; a synchronisation module operable to generate a synchronisation signal to control the computer to switch between a compute phase and an exchange phase, wherein the processing units are configured to execute their local programs according to a common clock, the local programs being such that in the exchange phase at least one processing unit executes a send instruction from its local program to transmit at a transmit time a data packet onto its output set of connection
    Type: Application
    Filed: October 19, 2018
    Publication date: May 23, 2019
    Applicant: Graphcore Limited
    Inventors: Simon Christian Knowles, Daniel John Pelham Wilkinson, Richard Luke Southwell Osborne, Alan Graham Alexander, Stephen Felix, Jonathan Mangnall, David Lacey
  • Publication number: 20190121388
    Abstract: The invention relates to a computer implemented method of generating multiple programs to deliver a computerised function, each program to be executed in a processing unit of a computer comprising a plurality of processing units each having instruction storage for holding a local program, an execution unit for executing the local program and data storage for holding data, a switching fabric connected to an output interface of each processing unit and connectable to an input interface of each processing unit by switching circuitry controllable by each processing unit, and a synchronisation module operable to generate a synchronisation signal, the method comprising: generating a local program for each processing unit comprising a sequence of executable instructions; determining for each processing unit a relative time of execution of instructions of each local program whereby a local program allocated to one processing unit is scheduled to execute with a predetermined delay relative to a synchronisation signal
    Type: Application
    Filed: February 1, 2018
    Publication date: April 25, 2019
    Applicant: Graphcore Limited
    Inventors: Simon Christian Knowles, Daniel John Pelham Wilkinson, Richard Luke Southwell Osborne, Alan Graham Alexander, Stephen Felix, Jonathan Mangnall, David Lacey
  • Publication number: 20190121777
    Abstract: The invention relates to a computer program comprising a sequence of instructions for execution on a processing unit having instruction storage for holding the computer program, an execution unit for executing the computer program and data storage for holding data, the computer program comprising one or more computer executable instruction which, when executed, implements: a send function which causes a data packet destined for a recipient processing unit to be transmitted on a set of connection wires connected to the processing unit, the data packet having no destination identifier but being transmitted at a predetermined transmit time; and a switch control function which causes the processing unit to control switching circuitry to connect a set of connection wires of the processing unit to a switching fabric to receive a data packet at a predetermined receive time.
    Type: Application
    Filed: February 1, 2018
    Publication date: April 25, 2019
    Applicant: Graphcore Limited
    Inventors: Simon Christian Knowles, Daniel John Pelham Wilkinson, Richard Luke Southwell Osborne, Alan Graham Alexander, Stephen Felix, Jonathan Mangnall, David Lacey
  • Publication number: 20190121387
    Abstract: The invention relates to a computer comprising: a plurality of processing units each having instruction storage holding a local program, an execution unit executing the local program, data storage for holding data; an input interface with a set of input wires, and an output interface with a set of output wires; a switching fabric connected to each of the processing units by the respective set of output wires and connectable to each of the processing units by the respective input wires via switching circuitry controllable by each processing unit; a synchronisation module operable to generate a synchronisation signal to control the computer to switch between a compute phase and an exchange phase, wherein the processing units are configured to execute their local programs according to a common clock, the local programs being such that in the exchange phase at least one processing unit executes a send instruction from its local program to transmit at a transmit time a data packet onto its output set of connection
    Type: Application
    Filed: February 1, 2018
    Publication date: April 25, 2019
    Applicant: Graphcore Limited
    Inventors: Simon Christian Knowles, Daniel John Pelham Wilkinson, Richard Luke Southwell Osborne, Alan Graham Alexander, Stephen Felix, Jonathan Mangnall, David Lacey
  • Publication number: 20180164796
    Abstract: A method for determining gas turbine engine fleet performance deterioration includes receiving data indicative of deterioration parameter values for a plurality of gas turbine engines. The method also includes determining an average deterioration parameter value for each gas turbine engine at a plurality of intervals, and further determining an individual engine slope between the average deterioration parameter value at each adjacent interval for each gas turbine engine. The method also includes determining a fleet average slope between each adjacent interval based on the individual engine slopes between each adjacent interval, the determined fleet average slopes being usable to determine a performance deterioration of a gas turbine engine in the fleet.
    Type: Application
    Filed: December 12, 2016
    Publication date: June 14, 2018
    Inventors: Carlos Jose Garciamoreno, Juan Pablo Arroyo, David Lacey Doel, Tim Horejs, Pablo Ochoa
  • Publication number: 20170313506
    Abstract: System and method of managing waste at waste transfer stations. Open faced bins allow human entry for sorting, segregation or quarantining waste before it is moved to or mixed with bulk waste stations. Bins are located in covered or uncovered bays located away from waste stations. Stops and guides for precise and safe placement of bins in bays are provided. Bins have quick hitch connection points. To collect, store and redirect leachates in bins, a liquid capture zone and drain hole is provided. Bay design prevents public access to machine areas and adjacent bays.
    Type: Application
    Filed: November 2, 2015
    Publication date: November 2, 2017
    Inventor: Brian Jason David LACEY
  • Publication number: 20140166840
    Abstract: A substrate carrier is provided. The substrate carrier includes a base for supporting a substrate. A plurality of support tabs is affixed to a surface of the base. The plurality of support tabs have a cavity defined within an inner region of each support tab of the plurality of support tabs. A plurality of protrusions extends from the surface of the base, wherein one of the plurality of protrusions mates with one cavity to support one of the plurality of support tabs. A film is deposited over the surface of the base, surfaces of the plurality of support tabs and surfaces of the plurality of protrusions.
    Type: Application
    Filed: December 14, 2012
    Publication date: June 19, 2014
    Applicant: INTERMOLECULAR, INC.
    Inventors: Wayne R. French, Kent Riley Child, Alonzo T. Collins, Jay B. Dedontney, Richard R. Endo, Aaron T. Francis, Zachary Fresco, Edward L. Haywood, Ashley David Lacey, Monica Sawkar Mathur, James Tsung, Danny Wang, Kenneth A. Williams, Maosheng Zhao
  • Patent number: 8707178
    Abstract: Apparatus, and an associated method, for visually alerting a user of a newly-received data message at a mobile station. A detector detects delivery of the message at the mobile station. And, in response to the detection of the delivery, a display driver causes display on a display device of an animated icon to alert the user of the newly-received message.
    Type: Grant
    Filed: November 22, 2006
    Date of Patent: April 22, 2014
    Assignee: BlackBerry Limited
    Inventors: Julian Paas, Jon-David Lacey
  • Publication number: 20090183099
    Abstract: Described are a system and method of navigating graphical user interface comprising a plurality of visual elements. The system comprises an input component for receiving an input and generating a navigational input based on the input, a visual element analyzer for analyzing visual elements to determine if the visual elements have an associated blockade condition, and for passing navigational inputs. The system further comprises a blockade condition analyzer for analyzing visual elements with an associated blockade to determine if the navigational input satisfies the blockade condition and an output component for receiving the navigational inputs passed from the visual element analyzer and for generating the input based on the navigational input.
    Type: Application
    Filed: January 16, 2008
    Publication date: July 16, 2009
    Applicant: RESEARCH IN MOTION LIMITED
    Inventors: JULIAN PAAS, MIKHAIL FOMITCHEV, JON-DAVID LACEY
  • Patent number: 7423375
    Abstract: An electroluminescent device having a protection layer in the cap bonding region to which the cap is bonded. The protection layer can be formed from photosensitive or non-photosensitive materials. The protection layer protects the layers below from being damage during removal of polymer materials.
    Type: Grant
    Filed: May 7, 2002
    Date of Patent: September 9, 2008
    Assignee: OSRAM GmbH
    Inventors: Ewald Guenther, Hooi Bin Lim, Shi Chai Chong, David Lacey
  • Publication number: 20080119211
    Abstract: Apparatus, and an associated method, for visually alerting a user of a newly-received data message at a mobile station. A detector detects delivery of the message at the mobile station. And, in response to the detection of the delivery, a display driver causes display on a display device of an animated icon to alert the user of the newly-received message.
    Type: Application
    Filed: November 22, 2006
    Publication date: May 22, 2008
    Applicant: RESEARCH IN MOTION LIMITED
    Inventors: Julian Paas, Jon-David Lacey