Abstract: A multi-purpose form with a plurality of label types on a single business form includes an adhesive-backed label, a label with a front-facing exposed adhesive, and labels which can form laminated water-resistant tags. The business form has a plurality of layers. The form includes die cuts which allow for layers to be peeled away from the form, exposing adhesive layers and forming the different label types.

Abstract: In a first aspect of the invention, a first method is provided for hierarchical scheduling. The first method includes the steps of (1) receiving data from one or more pipes, each pipe including a plurality of pipe flows (2) selecting a winning pipe from the one or more pipes from which to transmit data based upon one or more quality of service parameters corresponding to the winning pipe (3) selecting a pipe flow from the plurality of pipe flows included in the winning pipe based upon one or more quality of service parameters corresponding to the selected pipe flow and (4) transmitting data from the selected pipe flow. Numerous other aspects are provided.

Abstract: A command translation method, apparatus and system are provided for interfacing a processor and a memory. The processor initiates a memory system command in an extreme data rate (XDR) command format which is automatically converted by the command translation method, apparatus and system into a memory system command in a double data rate (DDR) format for forwarding to the memory. Associated with converting the memory system command to the DDR command format is controlling timing of one or more signals presented to the memory interface, the one or more signals being associated with processing the memory system command in the DDR command format. The processor has associated therewith an XDR memory interface controller which adjusts one or more timing parameters of the memory system command in the XDR command format so that DDR timing requirements for the memory system command in the DDR command format are met.

Abstract: Embodiments of the present invention provide methods and systems for allocating multiple tags to multiple requesters in back to back clock cycles. A tag pool may be divided into a predetermined number of sections. Each requester may be associated with at least one of the sections in the tag pool. When multiple tag requests are received from multiple requesters each section containing available tags may provide a tag to a requester associated with the section per clock cycle. Therefore, multiple tags may be provided to multiple requesters in back to back clock cycles, thereby increasing efficiency and improving performance.

Abstract: In a first aspect, a first method of reissuing a command involving bus access is provided. The first method includes the steps of (1) storing information associated with commands that are to be reissued, wherein the commands are each associated with respective input/output (I/O) devices seeking bus access; (2) storing a count for each of the commands, each count indicating a number of times the associated command has been reissued; (3) selecting a command to be reissued, from among the commands, based on the information associated with the command; and (4) determining a delay after which the selected command will be reissued, wherein the delay is determined based on the count associated with the selected command. Numerous other aspects are provided.

Abstract: In a first aspect, a method is provided for scheduling connections for a network processor. The method includes the steps of, in a cache, scheduling a plurality of connections to be serviced based on quality of service parameters stored in a control structure corresponding to each connection and during a scheduling opportunity (1) identifying one or more of the plurality of connections in the cache to be serviced; (2) selecting one of the connections identified to be serviced; (3) servicing the selected connection; (4) accessing one or more portions of the control structure in the cache; (5) calculating a next service time when the selected connection is to be serviced; and (6) determining whether to schedule the selected connection to be serviced in one of the cache and a calendar based on the next service time. Numerous other aspects are provided.

Abstract: A command translation method, apparatus and system are provided for interfacing a processor and a memory. The processor initiates a memory system command in an extreme data rate (XDR) command format which is automatically converted by the command translation method, apparatus and system into a memory system command in a double data rate (DDR) format for forwarding to the memory. Associated with converting the memory system command to the DDR command format is controlling timing of one or more signals presented to the memory interface, the one or more signals being associated with processing the memory system command in the DDR command format. The processor has associated therewith an XDR memory interface controller which adjusts one or more timing parameters of the memory system command in the XDR command format so that DDR timing requirements for the memory system command in the DDR command format are met.

Abstract: A data communication apparatus includes a plurality of output ports and a scheduler for assigning priorities for outbound data frames. The scheduler includes one or more scheduling queues. Each scheduling queue indicates an order in which data flows are to be serviced. At least one scheduling queue has a respective plurality of output ports assigned to the scheduling queue. That is, the scheduling queue is shared by two or more output ports.

Abstract: In a first aspect, a first method of scheduling a command to be issued on a bus is provided. The first method includes the steps of (1) associating an address and priority with each of a plurality of commands to be issued on the bus, wherein the priority associated with each command is based on the address associated with the command; (2) updating the priority associated with each command after a predetermined time period; and (3) from the plurality of commands, selecting a command to be issued on the bus based on the address and updated priority associated with the command to be issued. Numerous other aspects are provided.

Abstract: In a first aspect, a network processor includes a scheduler in which a scheduling queue is maintained. A last frame is dispatched from a flow queue maintained in the network processor, thereby emptying the flow queue. Data indicative of the size of the dispatched last frame is stored in association with the scheduler. A new frame corresponding to the emptied flow queue is received, and the flow corresponding to the emptied flow queue is attached to the scheduling queue. The flow is attached to the scheduling queue at a distance D from a current pointer for the scheduling queue. The distance D is determined based at least in part on the stored data indicative of the size of the dispatched last frame.

Abstract: A scheduler for a network processor includes a scheduling queue in which weighted fair queuing is applied. The scheduling queue has a range R. Flows are attached to the scheduling queue at a distance D from a current pointer for the scheduling queue. The distance D is calculated for each flow according to the formula D=((WF×FS)/SF), where WF is a weighting factor applicable to a respective flow; FS is a frame size attributable to the respective flow; and SF is a scaling factor. The scaling factor SF is adjusted depending on a comparison of the distance D to the range R.

Abstract: Embodiments of the present invention provide methods and systems for allocating multiple tags to multiple requesters in back to back clock cycles. A tag pool may be divided into a predetermined number of sections. Each requester may be associated with at least one of the sections in the tag pool. When multiple tag requests are received from multiple requesters each section containing available tags may provide a tag to a requester associated with the section per clock cycle. Therefore, multiple tags may be provided to multiple requesters in back to back clock cycles, thereby increasing efficiency and improving performance.

Abstract: In a first aspect, a first method of reissuing a command involving bus access is provided. The first method includes the steps of (1) storing information associated with commands that are to be reissued, wherein the commands are each associated with respective input/output (I/O) devices seeking bus access; (2) storing a count for each of the commands, each count indicating a number of times the associated command has been reissued; (3) selecting a command to be reissued, from among the commands, based on the information associated with the command; and (4) determining a delay after which the selected command will be reissued, wherein the delay is determined based on the count associated with the selected command. Numerous other aspects are provided.

Abstract: A scheduler for a network processor includes a scheduling queue in which weighted fair queuing is applied to define a sequence in which flows are to be serviced. The scheduling queue includes at least a first subqueue and a second subqueue. The first subqueue has a first range and a first resolution, and the second subqueue has an extended range that is greater than the first range and a lower resolution that is less than the first resolution. Flows that are to be enqueued within the range of highest precision to the current pointer of the scheduling queue are attached to the first subqueue. Flows that are to be enqueued outside the range of highest precision from the current pointer of the scheduling queue are attached to the second subqueue. Numerous other aspects are provided.

Abstract: In a first aspect of the invention, a first method is provided for hierarchical scheduling. The first method includes the steps of (1) selecting a first winning entry from one of a plurality of main calendars during a time unit, the first winning entry indicating a first pipe to be serviced during the time unit (2) determining that no pipe flow corresponding to the winning first pipe currently needs to be serviced during the time unit (3) selecting a second winning entry from the plurality of main calendars during the time unit, the second winning entry indicating a second pipe or an autonomous flow to be serviced during the time unit; and (4) servicing the autonomous flow or a pipe flow corresponding to the second winning entry during the time unit. Numerous other aspects are provided.

Abstract: In a first aspect, a method is provided for scheduling connections for a network processor. The method includes the steps of, in a cache, scheduling a plurality of connections to be serviced based on quality of service parameters stored in a control structure corresponding to each connection and during a scheduling opportunity (1) identifying one or more of the plurality of connections in the cache to be serviced; (2) selecting one of the connections identified to be serviced; (3) servicing the selected connection; (4) accessing one or more portions of the control structure in the cache; (5) calculating a next service time when the selected connection is to be serviced; and (6) determining whether to schedule the selected connection to be serviced in one of the cache and a calendar based on the next service time. Numerous other aspects are provided.

Abstract: In a first aspect of the invention, a first method is provided for hierarchical scheduling. The first method includes the steps of (1) receiving data from one or more pipes, each pipe including a plurality of pipe flows (2) selecting a winning pipe from the one or more pipes from which to transmit data based upon one or more quality of service parameters corresponding to the winning pipe (3) selecting a pipe flow from the plurality of pipe flows included in the winning pipe based upon one or more quality of service parameters corresponding to the selected pipe flow and (4) transmitting data from the selected pipe flow. Numerous other aspects are provided.