Abstract: A method and apparatus that provides improved loop inductance of decoupling capacitors. Vias are moved close to the pads and close to each other. Instead of placing power and ground vias on opposite sides of the capacitor, these vias are moved around to the same side of the capacitor and are placed as close to each other as manufacturing tolerances will allow. For designs using standard two-terminal surface mount capacitors, two vias per capacitor, and standard manufacturing procedures (no vias inside pads, for example), the lowest possible loop inductance of the capacitor's connections to the printed circuit board planes is provided. This results in the lowest effective capacitor series input inductance.

Abstract: A method and apparatus that provides improved loop inductance of decoupling capacitors. Vias are moved close to the pads and close to each other. Instead of placing power and ground vias on opposite sides of the capacitor, these vias are moved around to the same side of the capacitor and are placed as close to each other as manufacturing tolerances will allow. For designs using standard two-terminal surface mount capacitors, two vias per capacitor, and standard manufacturing procedures (no vias inside pads, for example), the lowest possible loop inductance of the capacitor's connections to the printed circuit board planes is provided. This results in the lowest effective capacitor series input inductance.

Abstract: A data processing system and method providing error protection for data transmitted between a processor and a buffer in one data format and transmitted between the buffer and a user device in a different data format. An adaptor is interposed between the processor and the buffer for transmitting to the buffer (i) successive data segments in the one data format, each ending with appended check bytes in a preselected cyclic redundancy code (CRC); and (ii) check bytes using the same CRC appended at the end of each segment in the different data format to create in the buffer records which are a composite of both formats, but viewed as in the one data format by the processor and as in the different data format by the user device. The boundaries of the segments in each format must be known to the adaptor. Since both formats use the same CRC, CRC bytes for each segment in each data format will provide an identical preselected value in the absence of a detectable error.

Abstract: An interconnection network comprises a pair of backplanes for receiving X pluggable node cards. The pair of backplanes include X backplane connector groups, each backplane connector group adapted to receive mating connectors from a pluggable node card. Each backplane connector group includes X/2 connectors. A first backplane includes first permanent wiring which interconnects a first subset of pairs of connectors between backplane connector groups. A second backplane includes second permanent wiring which interconnects a second subset of pairs of connectors between backplane connector groups. The first permanent wiring and second permanent wiring connect complementary subsets' of pairs of the connectors. A plurality of node cards, each including a card connector group, pluggably mate with the backplane connector groups. Each node card further includes a frontal connector that is adapted to receive a cable interconnection.