Abstract: Example embodiments relate to low-overhead, bidirectional error checking for a serial peripheral interface. An example device includes an integrated circuit. The device also includes a serial peripheral interface (SPI) with a Master In Slave Out (MISO) channel and a Master Out Slave In (MOSI) channel. The MOSI channel is configured to receive a write address, payload data, and a forward error-checking code usable to identify data corruption within the write address or the payload data. The integrated circuit is configured to calculate and provide a reverse error-checking code usable to identify data corruption within the write address or the payload data. Additionally, the integrated circuit is configured to compare the forward error-checking code to the reverse error-checking code. Further, the integrated circuit is configured to write, to the write address if the forward error-checking code matches the reverse error-checking code, the payload data.

Abstract: A method and system to provide timebase synchronization for multiple processors in a multi-processor sensor system, where each processor operates according to a respective reference clock, and where the processors' respective reference clocks are off sync from each other. An example method includes simultaneously injecting a synchronization pulse respectively into the multiple processors. Further, the method includes recording for each processor, according to the processor's respective reference clock, a respective synchronization-pulse timestamp of the simultaneously injected synchronization pulse, comparing the respective synchronization-pulse timestamps recorded for the processors, and, based on the comparing, computing for each processor a respective time offset. Additionally, the method includes using the per-processor computed time offsets as a basis to provide a synchronized timebase across the processors.

Abstract: Example embodiments relate to low-overhead, bidirectional error checking for a serial peripheral interface. An example device includes an integrated circuit. The device also includes a serial peripheral interface (SPI) with a Master In Slave Out (MISO) channel and a Master Out Slave In (MOSI) channel. The MOSI channel is configured to receive a write address, payload data, and a forward error-checking code usable to identify data corruption within the write address or the payload data. The integrated circuit is configured to calculate and provide a reverse error-checking code usable to identify data corruption within the write address or the payload data. Additionally, the integrated circuit is configured to compare the forward error-checking code to the reverse error-checking code. Further, the integrated circuit is configured to write, to the write address if the forward error-checking code matches the reverse error-checking code, the payload data.

Abstract: A method and system to provide timebase synchronization for multiple processors in a multi-processor sensor system, where each processor operates according to a respective reference clock, and where the processors' respective reference clocks are off sync from each other. An example method includes simultaneously injecting a synchronization pulse respectively into the multiple processors. Further, the method includes recording for each processor, according to the processor's respective reference clock, a respective synchronization-pulse timestamp of the simultaneously injected synchronization pulse, comparing the respective synchronization-pulse timestamps recorded for the processors, and, based on the comparing, computing for each processor a respective time offset. Additionally, the method includes using the per-processor computed time offsets as a basis to provide a synchronized timebase across the processors.

Abstract: A method and system to provide timebase synchronization for multiple processors in a multi-processor sensor system, where each processor operates according to a respective reference clock, and where the processors' respective reference clocks are off sync from each other. An example method includes simultaneously injecting a synchronization pulse respectively into the multiple processors. Further, the method includes recording for each processor, according to the processor's respective reference clock, a respective synchronization-pulse timestamp of the simultaneously injected synchronization pulse, comparing the respective synchronization-pulse timestamps recorded for the processors, and, based on the comparing, computing for each processor a respective time offset. Additionally, the method includes using the per-processor computed time offsets as a basis to provide a synchronized timebase across the processors.

Abstract: An optical receiver includes one or more photodetectors and an analog front end (AFE) configured to accept input signals from the one or more photodetectors. The AFE includes a non-linear gain amplifier (NLGA). The NLGA includes a piecewise linear gain stage configured to apply a piecewise linear transfer function to the input signals to form amplified signals. The AFE also includes a DC offset stage configured to apply a DC offset to the amplified signals. A related method of operation and vehicle are also disclosed.

Abstract: Example embodiments relate to a lower power linearization of lidar signals. An example embodiment includes a method that includes receiving a sample value output by an analog-to-digital converter (ADC) in a processing unit of a lidar system. The ADC may be configured to digitize an optical signal that is compressed by a gain amplifier. The compression may be based on a transfer function comprising one or more linear portions. The method also includes comparing the sample value to one or more threshold values. The one or more threshold values may correspond respectively to the one or more linear portions. The method further includes selecting, for the sample value and based on the comparing, an inverse gain and an associated intercept. The method additionally includes linearizing the sample value based on the selected inverse gain and the associated intercept.

Abstract: Example embodiments relate to low-overhead, bidirectional error checking for a serial peripheral interface. An example device includes an integrated circuit. The device also includes a serial peripheral interface (SPI) with a Master In Slave Out (MISO) channel and a Master Out Slave In (MOSI) channel. The MOSI channel is configured to receive a write address, payload data, and a forward error-checking code usable to identify data corruption within the write address or the payload data. The integrated circuit is configured to calculate and provide a reverse error-checking code usable to identify data corruption within the write address or the payload data. Additionally, the integrated circuit is configured to compare the forward error-checking code to the reverse error-checking code. Further, the integrated circuit is configured to write, to the write address if the forward error-checking code matches the reverse error-checking code, the payload data.

Abstract: A system and method for synchronizing multiple integrated circuit (IC) chips for an input device having a display device integrated with a capacitive sensing device. A first one of the IC chips is a master IC chip and a second one of the IC chips is a slave IC chip. The master IC chip is configured to transmit synchronization signals to and from the slave IC chip, such that capacitive frames are acquired by each of the IC chips at substantially the same time, the initiation of the sensing signals is synchronized for each of the IC chips and the clock signals of the slave IC chips are synchronized with the clock signal of the master IC chip.

Abstract: The subject matter of this specification can be implemented in, among other things, systems and methods of optical sensing that utilize time and frequency multiplexing of sensing signals. Described are, among other things, a light source subsystem to produce a first beam having a first frequency and a second beam having a second frequency, a modulator to impart a modulation to the second beam, and an optical interface subsystem to receive a third beam caused by interaction of the first beam with an object and a fourth beam caused by interaction of the second beam with the object. Also described are one or more circuits to determine, based on a first phase information carried by the third beam, a velocity of the object, and then determine, based on a second phase information carried by the third beam and the first phase information, a distance to the object.

Abstract: A force sensing device includes a first force sensor and a second force sensor. The first force sensor is configured to output a first force resulting signal and includes a first strain gauge coupled to a first voltage source and a first trace. The first force sensor further includes a second strain gauge coupled to a second voltage source and the first trace. The second force sensor is configured to output a second force resulting signal having a polarity opposite that of the first force resulting signal. The second force sensor includes a first strain gauge coupled to the second voltage source and a second trace, and a second strain gauge coupled to the first voltage source and the second trace.

Abstract: Embodiments disclosed herein generally relate to electronic devices, and more specifically, to a waveform generation circuit for input devices. One or more embodiments provide a new waveform generator for an integrated touch and display driver (TDDI) and methods for generating a waveform for capacitive sensing with a finely tunable sensing frequency. A waveform generator includes accumulator circuitry, truncation circuitry, and saturation circuitry. The accumulator circuitry is configured to accumulate the phase increment value based on a clock signal, and output the accumulated phase increment value. The truncation circuitry configured to drop one or more bits of the accumulated phase increment value to output a truncated value. The saturation circuitry is configured to compare the truncated value to a saturation limit and output a signal corresponding to accessed data samples.

Abstract: A processing system includes a sensor module configured to receive first and second signals from first and second sensor electrodes, respectively, and generate a combination signal. The processing system further includes a determination module configured to determine, using the first sensor electrode, an absolute capacitive coupling to an input object; determine, using the first and second sensor electrodes, a transcapacitive coupling; determine a ratio of the absolute to transcapacitive coupling; determine, using the combination signal, in absence of a predetermined low ground mass state, and when the ratio fails to exceed a predetermined threshold, first positional information regarding a location of the input object; and determine, when the ratio fails to exceed the predetermined threshold and in presence of the predetermined low ground mass state, second positional information regarding the location of the input object in the sensing region using an absolute capacitive scan.

Abstract: A system and method for synchronizing multiple integrated circuit (IC) chips for an input device having a display device integrated with a capacitive sensing device. A first one of the IC chips is a master IC chip and a second one of the IC chips is a slave IC chip. The master IC chip is configured to transmit synchronization signals to and from the slave IC chip, such that capacitive frames are acquired by each of the IC chips at substantially the same time, the initiation of the sensing signals is synchronized for each of the IC chips and the clock signals of the slave IC chips are synchronized with the clock signal of the master IC chip.

Abstract: A system and method for synchronizing multiple integrated circuit (IC) chips for an input device having a display device integrated with a capacitive sensing device. A first one of the IC chips is a master IC chip and a second one of the IC chips is a slave IC chip. The master IC chip is configured to transmit synchronization signals to and from the slave IC chip, such that capacitive frames are acquired by each of the IC chips at substantially the same time, the initiation of the sensing signals is synchronized for each of the IC chips and the clock signals of the slave IC chips are synchronized with the clock signal of the master IC chip.

Abstract: A force sensing device comprises a first force sensor and a second force sensor. The first force sensor is configured to output a first force resulting signal and comprises a first strain gauge coupled to a first voltage source and a first trace. The first force sensor further comprises a second strain gauge coupled to a second voltage source and the first trace. The second force sensor is configured to output a second force resulting signal having a polarity opposite that of the first force resulting signal. The second force sensor comprises a first strain gauge coupled to the second voltage source and a second trace, and a second strain gauge coupled to the first voltage source and the second trace.

Abstract: Embodiments disclosed herein generally relate to electronic devices, and more specifically, to a waveform generation circuit for input devices. One or more embodiments provide a new waveform generator for an integrated touch and display driver (TDDI) and methods for generating a waveform for capacitive sensing with a finely tunable sensing frequency. A waveform generator includes accumulator circuitry, truncation circuitry, and saturation circuitry. The accumulator circuitry is configured to accumulate the phase increment value based on a clock signal, and output the accumulated phase increment value. The truncation circuitry configured to drop one or more bits of the accumulated phase increment value to output a truncated value. The saturation circuitry is configured to compare the truncated value to a saturation limit and output a signal corresponding to accessed data samples.

Abstract: A processing system includes a sensor module configured to receive first and second signals from first and second sensor electrodes, respectively, and generate a combination signal. The processing system further includes a determination module configured to determine, using the first sensor electrode, an absolute capacitive coupling to an input object; determine, using the first and second sensor electrodes, a transcapacitive coupling; determine a ratio of the absolute to transcapacitive coupling; determine, using the combination signal, in absence of a predetermined low ground mass state, and when the ratio fails to exceed a predetermined threshold, first positional information regarding a location of the input object; and determine, when the ratio fails to exceed the predetermined threshold and in presence of the predetermined low ground mass state, second positional information regarding the location of the input object in the sensing region using an absolute capacitive scan.

Abstract: Embodiments disclosed herein generally relate to electronic devices, and more specifically, to a waveform generation circuit for input devices. One or more embodiments provide a new waveform generator for an integrated touch and display driver (TDDI) and methods for generating a waveform for capacitive sensing with a finely tunable sensing frequency. A waveform generator includes accumulator circuitry, truncation circuitry, and saturation circuitry. The accumulator circuitry is configured to accumulate the phase increment value based on a clock signal, and output the accumulated phase increment value. The truncation circuitry configured to drop one or more bits of the accumulated phase increment value to output a truncated value. The saturation circuitry is configured to compare the truncated value to a saturation limit and output a signal corresponding to accessed data samples.

Abstract: Embodiments disclosed herein generally relate to electronic devices, and more specifically, to a waveform generation circuit for input devices. One or more embodiments provide a new waveform generator for an integrated touch and display driver (TDDI) and methods for generating a waveform for capacitive sensing with a finely tunable sensing frequency. A waveform generator includes accumulator circuitry, truncation circuitry, and saturation circuitry. The accumulator circuitry is configured to accumulate the phase increment value based on a clock signal, and output the accumulated phase increment value. The truncation circuitry configured to drop one or more bits of the accumulated phase increment value to output a truncated value. The saturation circuitry is configured to compare the truncated value to a saturation limit and output a signal corresponding to accessed data samples.