Abstract: Devices, systems, and methods for limiting a slew rate of a driven device. In some embodiments, the device for limiting a slew rate of the driven device includes one or more slew rate limiting field-effect transistors (FETS) connected between a first circuit node and a node of the driven device, and a first control circuit. In some embodiments, the one or more first slew rate limiting FETs and the first control circuit are configured to set a rate at which the driven device is charged or discharged. In some embodiments, the first control circuit is within a voltage divider and the current flowing through the voltage divider is proportionally mirrored to the one or more first slew rate limiting FETs wherein the current mirror ratio is selected to ensure that a rate at which a capacitance of the driven device changes over time is below a specified limit.

Abstract: The present subject matter relates to charge pump devices, systems, and methods in which a plurality of series-connected charge-pump stages are connected between a supply voltage node and a primary circuit node, and a discharge circuit is connected to the plurality of charge-pump stages, wherein the discharge circuit is configured to selectively remove charge from the primary circuit node.

Abstract: The present subject matter relates to charge pump devices, systems, and methods in which a first plurality of series-connected charge-pump stages is connected between a supply voltage node and a first circuit node, wherein the first plurality of charge-pump stages are operable to produce a first electrical charge at the first circuit node, the first electrical charge having a first polarity; and a second plurality of series-connected charge-pump stages is connected between the supply voltage node and a second circuit node, wherein the second plurality of charge-pump stages are operable to produce a second electrical charge at the second circuit node, the second electrical charge having a second polarity.

Abstract: The present subject matter relates to charge pump devices, systems, and methods in which a plurality of series-connected charge-pump stages are connected between a supply voltage node and a primary circuit node, and a discharge circuit is connected to the plurality of charge-pump stages, wherein the discharge circuit is configured to selectively remove charge from the primary circuit node.

Abstract: The present subject matter relates to charge pump devices, systems, and methods in which a first plurality of series-connected charge-pump stages is connected between a supply voltage node and a first circuit node, wherein the first plurality of charge-pump stages are operable to produce a first electrical charge at the first circuit node, the first electrical charge having a first polarity; and a second plurality of series-connected charge-pump stages is connected between the supply voltage node and a second circuit node, wherein the second plurality of charge-pump stages are operable to produce a second electrical charge at the second circuit node, the second electrical charge having a second polarity.

Abstract: The present subject matter relates to charge pump devices, systems, and methods in which a plurality of series-connected charge-pump stages are connected between a supply voltage node and a primary circuit node, and a discharge circuit is connected to the plurality of charge-pump stages, wherein the discharge circuit is configured to selectively remove charge from the primary circuit node.

Abstract: The present subject matter relates to charge pump devices, systems, and methods in which a plurality of series-connected charge-pump stages are connected between a supply voltage node and a primary circuit node, and a discharge circuit is connected to the plurality of charge-pump stages, wherein the discharge circuit is configured to selectively remove charge from the primary circuit node.

Abstract: Devices, systems, and methods for limiting a slew rate of a driven device. In some embodiments, the device for limiting a slew rate of the driven device includes one or more slew rate limiting field-effect transistors (FETS) connected between a first circuit node and a node of the driven device, and a first control circuit. In some embodiments, the one or more first slew rate limiting FETs and the first control circuit are configured to set a rate at which the driven device is charged or discharged. In some embodiments, the first control circuit is within a voltage divider and the current flowing through the voltage divider is proportionally mirrored to the one or more first slew rate limiting FETs wherein the current mirror ratio is selected to ensure that a rate at which a capacitance of the driven device changes over time is below a specified limit.

Abstract: The present subject matter relates to charge pump devices, systems, and methods in which a first plurality of series-connected charge-pump stages is connected between a supply voltage node and a first circuit node, wherein the first plurality of charge-pump stages are operable to produce a first electrical charge at the first circuit node, the first electrical charge having a first polarity; and a second plurality of series-connected charge-pump stages is connected between the supply voltage node and a second circuit node, wherein the second plurality of charge-pump stages are operable to produce a second electrical charge at the second circuit node, the second electrical charge having a second polarity.

Abstract: The present subject matter relates to charge pump devices, systems, and methods in which a plurality of series-connected charge-pump stages are connected between a supply voltage node and a primary circuit node, and a discharge circuit is connected to the plurality of charge-pump stages, wherein the discharge circuit is configured to selectively remove charge from the primary circuit node.

Abstract: The present subject matter relates to charge pump devices, systems, and methods in which a first plurality of series-connected charge-pump stages is connected between a supply voltage node and a first circuit node, wherein the first plurality of charge-pump stages are operable to produce a first electrical charge at the first circuit node, the first electrical charge having a first polarity; and a second plurality of series-connected charge-pump stages is connected between the supply voltage node and a second circuit node, wherein the second plurality of charge-pump stages are operable to produce a second electrical charge at the second circuit node, the second electrical charge having a second polarity.

Abstract: The present subject matter relates to charge pump devices, systems, and methods in which a plurality of series-connected charge-pump stages are connected between a supply voltage node and a primary circuit node, and a discharge circuit is connected to the plurality of charge-pump stages, wherein the discharge circuit is configured to selectively remove charge from the primary circuit node.

Abstract: Apparatus and methods for temperature compensation of variable capacitors are provided herein. In certain configurations, an integrated circuit (IC) includes a variable capacitor array, an array biasing circuit that biases cells of the variable capacitor array to control the array's capacitance, and a bias voltage level control circuit that generates one or more temperature dependent bias voltages used by the array biasing circuit to bias the variable capacitor array's cells. The bias voltage level control circuit controls the one or more temperature dependent bias voltages to change with temperature so as to compensate the variable capacitor array for changes to capacitance arising from temperature variation.

Abstract: A direct current (DC)-DC converter, which includes a charge pump buck power supply and a buck power supply is disclosed. The charge pump buck power supply includes a charge pump buck converter, a first inductive element, and an energy storage element. The charge pump buck converter and the first inductive element are coupled in series between a DC power supply, such as a battery, and the energy storage element. The buck power supply includes a buck converter, a second inductive element, and the energy storage element. The buck converter and the second inductive element are coupled in series between the DC power supply and the energy storage element. As such, the charge pump buck power supply and the buck power supply share the energy storage element.

Abstract: Apparatus and methods for temperature compensation of variable capacitors are provided herein. In certain configurations, an integrated circuit (IC) includes a variable capacitor array, an array biasing circuit that biases cells of the variable capacitor array to control the array's capacitance, and a bias voltage level control circuit that generates one or more temperature dependent bias voltages used by the array biasing circuit to bias the variable capacitor array's cells. The bias voltage level control circuit controls the one or more temperature dependent bias voltages to change with temperature so as to compensate the variable capacitor array for changes to capacitance arising from temperature variation.

Abstract: Analog-to-digital pulse width modulation circuitry includes thermometer code generator circuitry, clock generator circuitry, delay selection circuitry, and an output stage. The thermometer code generator circuitry is adapted to generate a digital thermometer code based upon a received analog input voltage. The clock generator circuitry is adapted to generate a reference clock and a plurality of delayed clock signals. The delay selection circuitry is connected between the thermometer code generator circuitry and the clock generator circuitry, and is adapted to select one of the delayed clock signals to present to the output stage based upon the generated thermometer code. The selected delayed clock signal is delayed by an amount of time that is proportional to the generated thermometer code. The reference clock signal and the selected delayed clock signal are delivered to the output stage where they are used to generate a pulse width modulated output signal.

Abstract: The present disclosure relates to a flexible direct current (DC)-DC converter, which includes a charge pump buck power supply and a buck power supply. The charge pump buck power supply and the buck power supply are voltage compatible with one another at respective output inductance nodes to provide flexibility. In one embodiment of the DC-DC converter, capacitances at the output inductance nodes are at least partially isolated from one another by using at least an isolating inductive element between the output inductance nodes to increase efficiency. In an alternate embodiment of the DC-DC converter, the output inductance nodes are coupled to one another, such that the charge pump buck power supply and the buck power supply share a first inductive element, thereby eliminating the isolating inductive element, which reduces size and cost but may also reduce efficiency.

Abstract: DC to DC converter circuitry includes a dual phase charge pump and at least one pair of multiplier phase circuits. The dual phase charge pump is coupled to each one of the at least one pair of multiplier circuits and adapted to receive a DC input voltage and only four control signals, and produce a stepped-up output voltage. Each one of the at least one pair of multiplier phase circuits are adapted to receive the stepped-up output voltage, a cross-coupled control signal from the other multiplier phase circuit in the pair of multiplier phase circuits, and a different one of the control signals and further multiply the stepped-up output voltage to produce a multiplied stepped-up output voltage with a magnitude that is approximately three times that of the DC input voltage or greater.

Abstract: At least a first shunt switching element and switching control circuitry of a first switching power supply are disclosed. At least the first shunt switching element is coupled between a ground and an output inductance node of the first switching power supply. The first switching power supply provides a buck output signal from the output inductance node. The switching control circuitry selects one of an ON state and an OFF state of the first shunt switching element. When the buck output signal is above a first threshold, the switching control circuitry is inhibited from selecting the ON state. The first switching power supply provides a first switching power supply output signal based on the buck output signal. By using feedback based on the buck output signal, the switching control circuitry may refine the timing of switching between series switching elements and shunt switching elements to increase efficiency.

Abstract: A hybrid Direct Current (DC) to DC converter is disclosed for efficiently converting an input voltage from one level to another. In a preferred embodiment, a dual phase charge pump is combined with a buck converter and a switch controller to provide a converted voltage that is useable to cellular handset circuits based on power amplifier (PA) technology.