Patents by Inventor David Alcoe

David Alcoe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070230130
    Abstract: An electronic package which includes a substrate (e.g., a chip carrier substrate or a PCB), an electronic component (e.g., a semiconductor chip), a heatsink and a thermal interposer for effectively transferring heat from the chip to the heatsink. The interposer includes a compressible, resilient member (e.g., an elastomeric pad) and a plurality of thin, metallic sheets (e.g., copper foils) and the thickness thereof can be adjusted by altering the number of such foils.
    Type: Application
    Filed: April 4, 2006
    Publication date: October 4, 2007
    Applicant: Endicott Interconnect Technologies, Inc.
    Inventors: David Alcoe, Varaprasad Calmidi
  • Patent number: 7109732
    Abstract: A test apparatus and method in which a compressible housing is used to retain an electronic component having conductors thereon. The compressible housing is lowered onto a suitable base member having upstanding probes which are also compressible and which physically engage respective ones of the conductors at one end thereof and an appropriate conductor (e.g., conductive pads on a printed circuit board) on the other when the test apparatus is fully assembled and testing occurs.
    Type: Grant
    Filed: July 31, 2003
    Date of Patent: September 19, 2006
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventor: David Alcoe
  • Patent number: 7087846
    Abstract: An electronic package and information handling system utilizing same wherein the package substrate includes an internally conductive layer coupled to an external pad to provide reinforced adhesion of the pad to the substrate to substantially prevent cracking, separation, etc. of the pad when the pad has a pin bonded thereto and the package is coupled to an external substrate (e.g., printed circuit board). The reinforced adhesion also prevents pad separation, etc. during periods of package handling, manufacture, etc.
    Type: Grant
    Filed: April 28, 2003
    Date of Patent: August 8, 2006
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventor: David Alcoe
  • Patent number: 7015574
    Abstract: An electronic device carrier (110) adapted for transmitting high-frequency signals, including a circuitized substrate with a plurality of conductive layers (240a to 240g) insulated from each other, the conductive layers being arranged in a sequence from a first one of the conductive layers (240a) wherein a plurality of signal tracks (200) each one ending with a contact area (205) for transmitting a high-frequency signal are formed, and a reference structure (215a, 215b, 230) connectable to a reference voltage or ground for shielding the signal tracks the reference structure includes at least one reference track (230) formed in a second one of the conductive layers (240b) adjacent to the first conductive layer and at least one further reference track formed in one of the conductive layers (240d) different from the first and second conductive layer, a portion of each signal track excluding at least the area corresponding to the orthographic projection of associated contact area being superimposed in plan view t
    Type: Grant
    Filed: October 25, 2002
    Date of Patent: March 21, 2006
    Assignee: International Business Machines Corporation
    Inventors: David Alcoe, Ronald Nowak, Francesco Preda, Stefano Sergio Oggioni
  • Publication number: 20060005986
    Abstract: An electronic package includes a substrate having a contact pad thereon, a reformable member such as a solder ball positioned on the contact pad, and an elastic member positioned around the reformable member. The elastic member exerts a girdling force on the reformable member so that when the reformable member is softened, the elastic member elongates the reformable member. This elongation accommodates thermal and other stresses between the foregoing substrate and another substrate joined at the free end of the reformable member. An apparatus is also provided for positioning the elastic member on and around the reformable member.
    Type: Application
    Filed: September 7, 2005
    Publication date: January 12, 2006
    Inventor: David Alcoe
  • Publication number: 20050099783
    Abstract: A method and structure for forming an electronic structure that comprises a redistribution structure on a circuitized substrate. The redistribution structure includes N dielectric layers (N?2) and N metal planes formed in the following sequence: dielectric layer 1 on a metallic plane that exists on a surface of the substrate, metal plane 1 on dielectric layer 1, dielectric layer 2 on dielectric layer 1 and metal plane 1, metal plane 2 on the dielectric layer 2, . . . , dielectric layer N on dielectric layer N-1 and metal plane N-1, and metal plane N on the dielectric layer N. Metal planes or metallic planes may include signal planes, power planes, ground planes, etc. A microvia structure, which is formed through the N dielectric layers and electrically couples metal plane N to the metallic plane, includes a microvia or a portion of a microvia through each dielectric layer.
    Type: Application
    Filed: December 14, 2004
    Publication date: May 12, 2005
    Applicant: International Business Machines Corporation
    Inventors: David Alcoe, Kim Blackwell
  • Publication number: 20050022376
    Abstract: A test apparatus and method in which a compressible housing is used to retain an electronic component having conductors thereon. The compressible housing is lowered onto a suitable base member having upstanding probes which are also compressible and which physically engage respective ones of the conductors at one end thereof and an appropriate conductor (e.g., conductive pads on a printed circuit board) on the other when the test apparatus is fully assembled and testing occurs.
    Type: Application
    Filed: July 31, 2003
    Publication date: February 3, 2005
    Applicant: Endicott Interconnect Technologies, Inc.
    Inventor: David Alcoe
  • Patent number: 6815837
    Abstract: An electronic package and information handling system utilizing same wherein the package substrate includes an internally conductive layer coupled to an external pad and of a size sufficiently large enough to substantially prevent cracking, separation, etc. of the pad when the pad is subjected to a tensile pressure of about 1.4 grams per square mil or greater.
    Type: Grant
    Filed: April 28, 2003
    Date of Patent: November 9, 2004
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventor: David Alcoe
  • Publication number: 20040182604
    Abstract: An electronic package and information handling system utilizing same wherein the package substrate includes an internally conductive layer coupled to an external pad to provide reinforced adhesion of the pad to the substrate to substantially prevent cracking, separation, etc. of the pad when the pad has a pin bonded thereto and the package is coupled to an external substrate (e.g., printed circuit board). The reinforced adhesion also prevents pad separation, etc. during periods of package handling, manufacture, etc.
    Type: Application
    Filed: April 28, 2003
    Publication date: September 23, 2004
    Inventor: David Alcoe
  • Publication number: 20040183212
    Abstract: An electronic package and information handling system utilizing same wherein the package substrate includes an internally conductive layer coupled to an external pad and of a size sufficiently large enough to substantially prevent cracking, separation, etc. of the pad when the pad is subjected to a tensile pressure of about 1.4 grams per square mil or greater.
    Type: Application
    Filed: April 28, 2003
    Publication date: September 23, 2004
    Applicant: Endicott Interconnect technologies, Inc.
    Inventor: David Alcoe