Patents by Inventor David Andrew Barnes
David Andrew Barnes has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 7110424Abstract: A serializer/deserializer pair with a discretionary loop-back mechanism is disclosed that enables a redundant high-bandwidth node architecture that benefits from the clever re-use of two identical integrated circuits. The first is an add/drop multiplexor and the second comprises the serializer/deserializer pair with discretionary loop-back. The illustrative embodiment comprises: a first serializer that serializes a first series of r-bit words to generate a first series of s-bit words; a first deserializer that deserializes a second series of s-bit words to generate a second series of r-bit words; and a multiplexor for selecting a third series of r-bit words from the first series of r-bit words and the second series of r-bit words; wherein r and s are both positive integers and r?s.Type: GrantFiled: March 29, 2002Date of Patent: September 19, 2006Assignee: Bay Microsystems, Inc.Inventors: David Andrew Barnes, Walter Michael Pitio
-
Patent number: 6876227Abstract: A method of simplifying the layout of a printed circuit board is disclosed that enables an integrated circuit to modify—after the integrated circuit is manufactured—which pads transport which signals. An integrated circuit in accordance with the illustrative embodiment comprises a two-dimensional array of pads. At the time that the integrated circuit is designed, some or all of the pads are assigned to one or more “transposition groups.” One or more pads are included in a transposition group when, for example, it might be necessary or advantageous to transpose the signals carried by those pads after the integrated circuit has been manufactured. One or more of these transpositions can, for example, greatly simplify the layout of a printed circuit board.Type: GrantFiled: March 29, 2002Date of Patent: April 5, 2005Assignee: Parama Networks, Inc.Inventors: David Andrew Barnes, Walter Michael Pitio
-
Patent number: 6799246Abstract: A memory interface for connecting a bus to memory comprises an input, a buffer, an address input, a generator, and a writer. The input receives a plurality of data words from the bus. The buffer buffers the data words received from the bus. The address input receives from the bus addresses associated with the plurality of data words. The generator generates a series of addresses in the memory into which the buffered data words may be written. The series of addresses are derived from the received addresses. The writer writes the buffered data words into the memory at the generated addresses.Type: GrantFiled: December 16, 1997Date of Patent: September 28, 2004Assignee: Discovision AssociatesInventors: Adrian P. Wise, Kevin Douglas Dewar, Anthony Mark Jones, Martin William Sotheran, Colin Smith, Helen Rosemary Finch, Anthony Peter J. Claydon, Donald W. Walker Patterson, Mark Barnes, Andrew Peter Kuligowski, William Philip Robbins, Nicholas Birch, David Andrew Barnes
-
Publication number: 20030202544Abstract: A serializer/deserializer pair with a discretionary loop-back mechanism is disclosed that enables a redundant high-bandwidth node architecture that benefits from the clever re-use of two identical integrated circuits. The first is an add/drop multiplexor and the second comprises the serializer/deserializer pair with discretionary loop-back. The illustrative embodiment comprises: a first serializer that serializes a first series of r-bit words to generate a first series of s-bit words; a first deserializer that deserializes a second series of s-bit words to generate a second series of r-bit words; and a multiplexor for selecting a third series of r-bit words from the first series of r-bit words and the second series of r-bit words; wherein r and s are both positive integers and r≧s.Type: ApplicationFiled: March 29, 2002Publication date: October 30, 2003Inventors: David Andrew Barnes, Walter Michael Pitio
-
Publication number: 20030183404Abstract: A method of simplifying the layout of a printed circuit board is disclosed that enables an integrated circuit to modify—after the integrated circuit is manufactured—which pads transport which signals. An integrated circuit in accordance with the illustrative embodiment comprises a two-dimensional array of pads. At the time that the integrated circuit is designed, some or all of the pads are assigned to one or more “transposition groups.” One or more pads are included in a transposition group when, for example, it might be necessary or advantageous to transpose the signals carried by those pads after the integrated circuit has been manufactured. One or more of these transpositions can, for example, greatly simplify the layout of a printed circuit board.Type: ApplicationFiled: March 29, 2002Publication date: October 2, 2003Inventors: David Andrew Barnes, Walter Michael Pitio
-
Patent number: 6217234Abstract: An MPEG video decompression method and apparatus utilizing a plurality of stages interconnected by a two-wire interface arranged as a pipeline processing machine. Control tokens and DATA Tokens pass over the single two-wire interface for carrying both control and data in token format. A token decode circuit is positioned in certain of the stages for recognizing certain of the tokens as control tokens pertinent to that stage and for passing unrecognized control tokens along the pipeline. Reconfiguration processing circuits are positioned in selected stages and are responsive to a recognized control token for reconfiguring such stage to handle an identified DATA Token. A wide variety of unique supporting subsystem circuitry and processing techniques are disclosed for implementing the system, including memory addressing, transforming data using a common processing block, time synchronization, asynchronous swing buffering, storing of video information, a parallel Huffman decoder, and the like.Type: GrantFiled: June 7, 1995Date of Patent: April 17, 2001Assignee: Discovision AssociatesInventors: Kevin D. Dewar, Anthony Mark Jones, Martin William Sotheran, David Andrew Barnes
-
Patent number: 5984512Abstract: An MPEG video decompression method and apparatus utilizing a plurality of stages interconnected by a two-wire interface arranged as a pipeline processing machine. Control tokens and DATA Tokens pass over the single two-wire interface for carrying both control and in token format. A token decode circuit is positioned in certain of the stages for recognizing certain of the tokens as control tokens pertinent to that stage and for passing unrecognized control tokens along the pipeline. Reconfiguration processing circuits are positioned in select stages and are responsive to a recognized control token for reconfiguring such stages to handle an identified DATA Token. A wide variety of unique supporting subsystems circuitry and processing techniques are disclosed for implementing the system, including memory addressing, transforming data using a common processing block, time synchronization, asynchronous swing buffering, storing of video information, a parallel Huffman decoder, and the like.Type: GrantFiled: June 7, 1995Date of Patent: November 16, 1999Assignee: Discovision AssociatesInventors: Anthony Mark Jones, Colin Smith, Helen Rosemary Finch, Anthony Peter John Claydon, Donald William Patterson, William P. Robbins, Nicholas Birch, David Andrew Barnes
-
Patent number: 5835792Abstract: An MPEG video decompression method and apparatus utilizing a plurality of stages interconnected by a two-wire interface arranged as a pipeline processing machine. Control tokens and DATA Tokens pass over the single two-wire interface for carrying both control and data in token format. A token decode circuit is positioned in certain of the stages for recognizing certain of the tokens as control tokens pertinent to that stage and for passing unrecognized control tokens along the pipeline. Reconfiguration processing circuits are positioned in selected stages and are responsive to a recognized control token for reconfiguring such stage to handle an identified DATA Token. A wide variety of unique supporting subsystem circuitry and processing techniques are disclosed for implementing the system, including memory addressing, transforming data using a common processing block, time synchronization, asynchronous swing buffering, storing of video information, a parallel Huffman decoder, and the like.Type: GrantFiled: June 7, 1995Date of Patent: November 10, 1998Assignee: Discovision AssociatesInventors: Adrian P. Wise, Kevin D. Dewar, Anthony Mark Jones, Martin William Sotheran, Colin Smith, Helen Rosemary Finch, Anthony Peter John Claydon, Donald William Patterson, Mark Barnes, Andrew Peter Kuligowski, William P. Robbins, Nicholas Birch, David Andrew Barnes
-
Patent number: 5829007Abstract: A RAM implementation of asynchronous swing buffering is provided in which two buffers are operated asynchronously; one is written while the other is read. Accordingly, this allows for a data stream having a fast rate of through-put to be resynchronized to another rate, while still maintaining a desired rate. In the invention, the write control and read control both have state indicators for communicating which buffer they are using and whether the controls are waiting for access or are, in fact, accessing that buffer.Type: GrantFiled: June 7, 1995Date of Patent: October 27, 1998Assignee: Discovision AssociatesInventors: Adrian P. Wise, Kevin D. Dewar, Anthony Mark Jones, Martin William Sotheran, Colin Smith, Helen Rosemary Finch, Anthony Peter John Claydon, Donald William Patterson, Mark Barnes, Andrew Peter Kuligowski, William P. Robbins, Nicholas Birch, David Andrew Barnes
-
Patent number: 5821885Abstract: An MPEG video decompression method and apparatus utilizing a plurality of stages interconnected by a two-wire interface arranged as a pipeline processing machine. Control tokens and DATA Tokens pass over the single two-wire interface for carrying both control and data in token format. A token decode circuit is positioned in certain of the stages for recognizing certain of the tokens as control tokens pertinent to that stage and for passing unrecognized control tokens along the pipeline. Reconfiguration processing circuits are positioned in selected stages and are responsive to a recognized control token for reconfiguring such stage to handle an identified DATA Token. A wide variety of unique supporting subsystem circuitry and processing techniques are disclosed for implementing the system, including memory addressing, transforming data using a common processing block, time synchronization, asynchronous swing buffering, storing of video information, a parallel Huffman decoder, and the like.Type: GrantFiled: June 7, 1995Date of Patent: October 13, 1998Assignee: Discovision AssociatesInventors: Adrian P. Wise, Kevin D. Dewar, Anthony Mark Jones, Martin William Sotheran, Colin Smith, Helen Rosemary Finch, Anthony Peter John Claydon, Donald William Patterson, Mark Barnes, Andrew Peter Kuligowski, William P. Robbins, Nicholas Birch, David Andrew Barnes
-
Patent number: 5768629Abstract: An MPEG video decompression method and apparatus utilizing a plurality of stages interconnected by a two-wire interface arranged as a pipeline processing machine. Control tokens and DATA Tokens pass over the single two-wire interface for carrying both control and data in token format. A token decode circuit is positioned in certain of the stages for recognizing certain of the tokens as control tokens pertinent to that stage and for passing unrecognized control tokens along the pipeline. Reconfiguration processing circuits are positioned in selected stages and are responsive to a recognized control token for reconfiguring such stage to handle an identified DATA Token. A wide variety of unique supporting subsystem circuitry and processing techniques are disclosed for implementing the system, including memory addressing, transforming data using a common processing block, time synchronization, asynchronous swing buffering, storing of video information, a parallel Huffman decoder, and the like.Type: GrantFiled: June 7, 1995Date of Patent: June 16, 1998Assignee: Discovision AssociatesInventors: Adrian P. Wise, Kevin D. Dewar, Anthony Mark Jones, Martin William Sotheran, Colin Smith, Helen Rosemary Finch, Anthony Peter John Claydon, Donald William Patterson, Mark Barnes, Andrew Peter Kuligowski, William P. Robbins, Nicholas Birch, David Andrew Barnes
-
Patent number: 5740460Abstract: An MPEG video decompression method and apparatus utilizing a plurality of stages interconnected by a two-wire interface arranged as a pipeline processing machine. Control tokens and DATA Tokens pass over the single two-wire interface for carrying both control and data in token format. A token decode circuit is positioned in certain of the stages for recognizing certain of the tokens as control tokens pertinent to that stage and for passing unrecognized control tokens along the pipeline. Reconfiguration processing circuits are positioned in selected stages and are responsive to a recognized control token for reconfiguring such stage to handle an identified DATA Token. A wide variety of unique supporting subsystem circuitry and processing techniques are disclosed for implementing the system, including memory addressing, transforming data using a common processing block, time synchronization, asynchronous swing buffering, storing of video information, a parallel Huffman decoder, and the like.Type: GrantFiled: June 7, 1995Date of Patent: April 14, 1998Assignee: Discovision AssociatesInventors: Adrian P. Wise, Kevin D. Dewar, Anthony Mark Jones, Martin William Sotheran, Colin Smith, Helen Rosemary Finch, Anthony Peter John Claydon, Donald William Patterson, Mark Barnes, Andrew Peter Kuligowski, William P. Robbins, Nicholas Birch, David Andrew Barnes