Patents by Inventor David Aoyagi

David Aoyagi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Capacitor structure used for flash memory
    Patent number: 7749855
    Abstract: A method of forming a capacitor for use as a charge pump with flash memory, comprising: (a) concurrently forming polysilicon gates on a semiconductor body in a core region and a polysilicon middle capacitor plate in a peripheral region, (b) forming a first dielectric layer over the polysilicon gates and the middle capacitor plate, (c) planarizing the first dielectric layer to expose a top portion of the polysilicon gates and a top portion of the middle capacitor plate, (d) forming a second dielectric layer over the top portion of the middle capacitor layer, (e) concurrently forming patterning a second polysilicon layer in the core region and a third capacitor plate in the periphery region and (f) connecting the third capacitor plate to the source/drain well.
    Type: Grant
    Filed: August 14, 2007
    Date of Patent: July 6, 2010
    Assignee: Spansion LLC
    Inventors: Nian Yang, Yonggang Wu, David Aoyagi
  • CAPACITOR STRUCTURE USED FOR FLASH MEMORY
    Publication number: 20090045445
    Abstract: A method of forming a capacitor for use as a charge pump with flash memory, comprising: (a) concurrently forming polysilicon gates on a semiconductor body in a core region and a polysilicon middle capacitor plate in a peripheral region, (b) forming a first dielectric layer over the polysilicon gates and the middle capacitor plate, (c) planarizing the first dielectric layer to expose a top portion of the polysilicon gates and a top portion of the middle capacitor plate, (d) forming a second dielectric layer over the top portion of the middle capacitor layer, (e) concurrently forming patterning a second polysilicon layer in the core region and a third capacitor plate in the periphery region and (f) connecting the third capacitor plate to the source/drain well.
    Type: Application
    Filed: August 14, 2007
    Publication date: February 19, 2009
    Inventors: Nian Yang, Yonggang Wu, David Aoyagi