Patents by Inventor David Arfon Williams

David Arfon Williams has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8125742
    Abstract: A Lorentz Magnetoresistive sensor having an extremely small lead width and lead spacing is disclosed. The sensor can be constructed by a novel fabrication method that allows the leads to be deposited in such a manner that lead width and spacing between the leads is determined by the as deposited thicknesses of the lead layers and electrically insulating spacer layers between the leads rather than by photolithography. Because the lead thicknesses and lead spacings are not defined photolithograhically, the lead thickness and lead spacing are not limited by photolithographic resolution limits.
    Type: Grant
    Filed: September 18, 2007
    Date of Patent: February 28, 2012
    Assignee: Hitachi Global Storage Technologies Netherlands B.V.
    Inventors: Bruce Alvin Gurney, Ernesto E. Marinero, Andrew Stuart Troup, David Arfon Williams, Joerg Wunderlich
  • Patent number: 8035932
    Abstract: A Lorentz magnetoresistive sensor having integrated signal amplification. The sensor is constructed upon a substrate such as a semiconductor material, and an amplification circuit such as transistor is constructed directly into the substrate on which the magnetoresistive device is constructed. This integrated signal amplification greatly enhances sensor performance by eliminating a great deal of signal noise that would otherwise be added to the read signal.
    Type: Grant
    Filed: September 20, 2007
    Date of Patent: October 11, 2011
    Assignee: Hitachi Global Storage Technologies Netherlands B.V.
    Inventors: Bruce Alvin Gurney, Ernesto E. Marinero, Andrew Stuart Troup, David Arfon Williams, Joerg Wunderlich
  • Publication number: 20090080118
    Abstract: A Lorentz magnetoresistive sensor having integrated signal amplification. The sensor is constructed upon a substrate such as a semiconductor material, and an amplification circuit such as transistor is constructed directly into the substrate on which the magnetoresistive device is constructed. This integrated signal amplification greatly enhances sensor performance by eliminating a great deal of signal noise that would otherwise be added to the read signal.
    Type: Application
    Filed: September 20, 2007
    Publication date: March 26, 2009
    Inventors: Bruce Alvin Gurney, Ernesto E. Marinero, Andrew Stuart Troup, David Arfon Williams, Joerg Wunderlich
  • Publication number: 20090073615
    Abstract: A Lorentz Magnetoresistive sensor having an extremely small lead width and lead spacing is disclosed. The sensor can be constructed by a novel fabrication method that allows the leads to be deposited in such a manner that lead width and spacing between the leads is determined by the as deposited thicknesses of the lead layers and electrically insulating spacer layers between the leads rather than by photolithography. Because the lead thicknesses and lead spacings are not defined photolithograhically, the lead thickness and lead spacing are not limited by photolithographic resolution limits.
    Type: Application
    Filed: September 18, 2007
    Publication date: March 19, 2009
    Inventors: Bruce Alvin Gurney, Ernesto E. Marinero, Andrew Stuart Troup, David Arfon Williams, Joerg Wunderlich
  • Patent number: 6771012
    Abstract: Apparatus for producing a flux of charge carriers that may be used in many applications including imaging and lithography comprises an electron source which includes an emitter with a tip radius of about one nanometer and a closely configured extractor, together with a specimen for receiving an electron beam from the source. The apparatus may operate in air under atmospheric conditions and at a much reduced operating voltage.
    Type: Grant
    Filed: March 12, 2001
    Date of Patent: August 3, 2004
    Assignee: Hitachi Europe, Ltd.
    Inventors: Haroon Ahmed, David Hasko, Alex Driskill-Smith, David Arfon Williams
  • Patent number: 6635898
    Abstract: A quantum computer comprises a trench-isolated channel region formed in a boron-doped silicon germanium layer which has narrow channel regions which form tunnel barriers and wide channel regions which define first and second quantum dots. Tunnelling between the first and second quantum dots is controlled by a side gate and/or a surface gate. The quantum states used to represent a qubit may be defined as |an excess hole on the first quantum dot> and |an excess hole on the second quantum dot>. A Hadamard Transformation UH of an initial state may be effected by application of a pulse to the side or surface gate. The first and second tunnel quantum dots are of unequal size which helps decouple the quantum computer from the environment.
    Type: Grant
    Filed: November 19, 2001
    Date of Patent: October 21, 2003
    Assignee: Hitachi, Ltd.
    Inventors: David Arfon Williams, Paul Cain
  • Publication number: 20020190249
    Abstract: A quantum computer comprises a trench-isolated channel region formed in a boron-doped silicon germanium layer which has narrow channel regions which form tunnel barriers and wide channel regions which define first and second quantum dots. Tunnelling between the first and second quantum dots is controlled by a side gate and/or a surface gate. The quantum states used to represent a qubit may be defined as |an excess hole on the first quantum dot> and |an excess hole on the second quantum dot>. A Hadamard Transformation UH of an initial state may be effected by application of a pulse to the side or surface gate. The first and second tunnel quantum dots are of unequal size which helps decouple the quantum computer from the environment.
    Type: Application
    Filed: November 19, 2001
    Publication date: December 19, 2002
    Inventors: David Arfon Williams, Paul Cain
  • Patent number: 6483100
    Abstract: Silicon possesses an indirect band-gap, which limits its use in some photonic applications. A phonon generator is included in a silicon-based device, which promotes electron-hole recombination and so allows silicon to emit photons efficiently. Phonons may be generated by optical or electrical stimulation or as a result energy relaxation of hot-electrons.
    Type: Grant
    Filed: November 13, 2000
    Date of Patent: November 19, 2002
    Assignee: Hitachi, Ltd.
    Inventors: David Arfon Williams, Jeremy John Baumberg
  • Patent number: 6455872
    Abstract: A photo-detector comprises a photo-absorptive region (1) which absorbs individual incident photons to produce corresponding electron-hole pairs. A bias (Vb) applied by an electrode (3) to the region 1 separates the oppositely charged electrons and holes such that the individual electrons apply a gate field to an electrometer (4) in the form of a single electron transistor which has a source-drain path (6) along which carrier charged transport is limited Coulomb blockade. The charge of the individual, photo-induced electrons (e) modulate charge carrier transport through the single electron transistor and the resulting current is detected by amplifier (A1) to produce an voltage output (Vout) so as to detect incident photons individually.
    Type: Grant
    Filed: August 15, 2000
    Date of Patent: September 24, 2002
    Assignee: Hitachi, Ltd.
    Inventors: David Arfon Williams, Albert Herble, Jeremy Allam
  • Publication number: 20010040215
    Abstract: Apparatus for producing a flux of charge carriers that may be used in many applications including imaging and lithography comprises an electron source which includes an emitter with a tip radius of about one nanometer and a closely configured extractor, together with a specimen for receiving an electron beam from the source. The apparatus may operate in air under atmospheric conditions and at a much reduced operating voltage.
    Type: Application
    Filed: March 12, 2001
    Publication date: November 15, 2001
    Inventors: Haroon Ahmed, David Hasko, Alex Driskill-Smith, David Arfon Williams
  • Patent number: 6088604
    Abstract: A superconductor-normal conductor junction device comprises first and second regions (1, 3) of normal material forming first and second junctions with a superconducting material (2), the Fermi level of the first region of normal material being so arranged relative to a given energy level in the superconducting material that charge carriers in the first normal material undergo Andreev reflection at the first junction, resulting in pairs of the charge carriers entering said given energy level in the superconducting material, and the Fermi level of the second region of normal material being so arranged relative to said given level in the superconducting material that said charge carriers conduct from the superconducting material through the second region.
    Type: Grant
    Filed: January 19, 1995
    Date of Patent: July 11, 2000
    Assignee: Hitachi, Ltd.
    Inventors: David Arfon Williams, Adrian Michael Marsh, Haroon Ahmed, Bruce William Alphenaar