Abstract: Apparatus and method to measure the quality of burst signals and to perform optical line diagnostics in and optical passive optical network (PON). Statistical information about phase noise (jitter), signal distortion, clock distortions, and any other effects present in burst signals is generated. The statistics are based oil phase and bit-length distortions, direction and length of the effect as detected by a phase error detector integrated in a burst mode clock and data recovery (BCDR) circuit. The invention can be further adapted to perform optical line diagnostics to detect the root cause performance degradation and failures in the PON, thereby providing an optical layer supervision tool for monitoring the PON. The statistical information can be used to estimate the quality of service (QoS) per customer connected to the PON. In addition, the generated statistic information can be used to calibrate transmission parameters of optical network unit (ONU) transmitters.

Abstract: Burst mode clock and data recovery (BCDR) circuit and method capable of fast data recovery of passive optical network (PON) traffic. An over-sampled data stream is generated from an input burst data signal and a phase interpolator generates sampling clock signals using a reference clock and phase information. A phase estimation unit (PEU) determines a phase error in the over-sampled data streams; and a phase retrieval unit sets the phase interpolator with the respective phase information of the input burst data signal prior to reception of the input burst data signal.

Abstract: An internal bus architecture capable of providing high speed inter-connection and inter-communication between modules connected in an integrated circuit such as an application specific integrated circuit (ASIC). The internal bus architecture includes multiple interface units for interfacing with the modules of the ASIC and at least one basic modular unit coupled to the interface units for allowing simultaneous data transfers between the interface units. Each of the basic modular units has an upload unit for transferring upstream data, and a download unit for transferring downstream data.

Abstract: An enhanced passive optical network (PON) processor adapted to serve a plurality of PON applications is disclosed. The PON processor is a highly integrated communications processor that can operate in different PON modes including, but not limited to, a gigabit PON (GPON), a broadband PON (BPON), an Ethernet PON (EPON), or any combination thereof. In an embodiment of the present invention the provided PON is fabricated on a single integrated circuit (IC).

Abstract: An internal bus architecture capable of providing high speed inter-connection and inter-communication between modules connected in an integrated circuit such as an application specific integrated circuit (ASIC). The internal bus architecture includes multiple interface units for interfacing with the modules of the ASIC and at least one basic modular unit coupled to the interface units for allowing simultaneous data transfers between the interface units. Each of the basic modular units has an upload unit for transferring upstream data, and a download unit for transferring downstream data.