Abstract: The present invention is circuitry which is employed with a data terminal which data terminal in turn is part of a system including a main data processor. The present circuitry includes a microprocessor which is connected to the main data processor and to the keyboard. The microprocessor processes signals from both the main data processor and the keyboard. The system has a plurality of operational function circuits, such as a circuit to effect smooth scrolling on a data display means. There is logic circuitry connected between the microprocessor and the operational function circuits. The logic circuitry provides a first path which permits signals, generated in response to instructions from the main data processor, to pass therethrough to select one of the operational function circuits and simultaneously therewith to turn the selected circuit either on or off.

Abstract: The present invention includes a microprocessor which acts to generate groups of its signals from its read only memory (ROM) thereby forming character representations of groups of coded signals, such as ASCII coded signals, coming from a main data processing device. The groups of bit signals are temporarily stored in a buffer which at a subsequent time transmits, in parallel, groups of said bit signals to a bit map memory through some logic circuitry. The group, or block, transfer of said bit signals in parallel, occurs during horizontal or vertical blank periods. The parallel transfer during the blank periods provides part of the basis for acceleration of the data to a display device as compared with the prior art. In addition, the microprocessor provides address information signals to a graphic display controller, which in turn provides starting addresses, for the locations of the bit signals.