Patents by Inventor David B. Minturn

David B. Minturn has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140181365
    Abstract: Examples are disclosed for configuring a solid state drive (SSD) to operate in a storage mode or a memory mode. In some examples, one or more configuration commands may be received at a controller for an SSD having one or more non-volatile memory arrays. The SSD may be configured to operate in at least one of a storage mode, a memory mode or a combination of the storage mode or the memory mode based on the one or more configuration commands. Other examples are described and claimed.
    Type: Application
    Filed: December 21, 2012
    Publication date: June 26, 2014
    Inventors: BLAISE FANNING, MARK A. SCHMISSEUR, RAYMOND S. TETRICK, ROBERT J. ROYER, JR., DAVID B. MINTURN, SHANE MATTHEWS
  • Publication number: 20130201998
    Abstract: In one embodiment, a method is provided. The method of this embodiment provides storing a packet header at a set of at least one page of memory allocated to storing packet headers, and storing the packet header and a packet payload at a location not in the set of at least one page of memory allocated to storing packet headers.
    Type: Application
    Filed: August 6, 2012
    Publication date: August 8, 2013
    Inventors: Linden Cornett, David B. Minturn, Sujoy Sen, Hemal V. Shah, Anshuman Thakur, Gary Y. Tsao, Anil Vasudevan
  • Patent number: 8238360
    Abstract: In one embodiment, a method is provided. The method of this embodiment provides storing a packet header at a set of at least one page of memory allocated to storing packet headers, and storing the packet header and a packet payload at a location not in the set of at least one page of memory allocated to storing packet headers.
    Type: Grant
    Filed: May 26, 2005
    Date of Patent: August 7, 2012
    Assignee: Intel Corporation
    Inventors: Linden Cornett, David B. Minturn, Sujoy Sen, Hemal V. Shah, Anshuman Thakur, Gary Y. Tsao, Anil Vasudevan
  • Patent number: 8121125
    Abstract: In one embodiment, a method is provided. The method of this embodiment provides performing packet processing on one or more packets, and substantially simultaneously with said performing packet processing, using a data movement module to place one or more payloads corresponding to the one or more packets into a read buffer.
    Type: Grant
    Filed: December 30, 2004
    Date of Patent: February 21, 2012
    Assignee: Intel Corporation
    Inventors: Anil Vasudevan, Dennis Michael Bell, David B. Minturn, Sujoy Sen
  • Patent number: 7808989
    Abstract: A multiple-domain processing system includes a multi-dimensional switching fabric to provide intra-domain and inter-domain communication within the system.
    Type: Grant
    Filed: November 5, 2007
    Date of Patent: October 5, 2010
    Inventors: Oleg Awsienko, Edward Butler, Gary L. McAlpine, David B. Minturn, Joseph Schaefer, Gary A. Solomon
  • Patent number: 7783769
    Abstract: In one embodiment, a method is provided. The method of this embodiment provides receiving an indication on a network component that one or more packets have been received from a network; the network component notifying a TCP-A (transport control protocol—accelerated) driver that the one or more packets have arrived; a TCP-A driver performing packet processing for at least one of the one or more packets; and the TCP-A driver performing one or more operations that result in a data movement module placing one or more corresponding payloads of the at least one of the one or more packets into a read buffer.
    Type: Grant
    Filed: March 31, 2004
    Date of Patent: August 24, 2010
    Assignee: Intel Corporation
    Inventors: Anil Vasudevan, Dennis Michael Bell, David B. Minturn, Sujoy Sen
  • Patent number: 7720930
    Abstract: Systems and methods using network interface card-based (NIC-based) prefetching for host TCP context lookup are disclosed. The process generally includes hashing, by the NIC, a packet received over the network, computing a host hash table cache line in a host memory using the hash value and using a hash table pages table containing host memory physical page addresses of a host hash table, and computing a host context table cache line in a host memory using the hash value and using a context table pages table containing host memory physical page addresses of a host context table. The NIC may be initialized with the hash table pages table and the context table pages table as well as with the a set number of hash node entries in the hash table of the host memory.
    Type: Grant
    Filed: December 30, 2003
    Date of Patent: May 18, 2010
    Assignee: Intel Corporation
    Inventor: David B. Minturn
  • Patent number: 7461173
    Abstract: A method of maintaining network protocol timers in data structures associated with different respective processors in a multi-processor system. The timers accessed by a respective one of the processors include timers of connections mapped to the processor.
    Type: Grant
    Filed: June 30, 2004
    Date of Patent: December 2, 2008
    Assignee: Intel Corporation
    Inventors: Sujoy Sen, Linden Cornett, Prafulla Deuskar, David B Minturn
  • Publication number: 20080144619
    Abstract: A multiple-domain processing system includes a multi-dimensional switching fabric to provide intra-domain and inter-domain communication within the system.
    Type: Application
    Filed: November 5, 2007
    Publication date: June 19, 2008
    Inventors: Oleg Awsienko, Edward Butler, Gary L. McAlpine, David B. Minturn, Joseph Schaefer, Gary A. Solomon
  • Patent number: 7310319
    Abstract: A multiple-domain processing system includes a multi-dimensional switching fabric to provide intra-domain and inter-domain communication within the system.
    Type: Grant
    Filed: November 2, 2001
    Date of Patent: December 18, 2007
    Assignee: Intel Corporation
    Inventors: Oleg Awsienko, Edward Butler, Gary L. McAlpine, David B. Minturn, Joseph Schaefer, Gary A. Solomon
  • Patent number: 7305493
    Abstract: An apparatus and a system may include an adaptation module, a plurality of Direct Transport Interfaces (DTIs), a DTI accelerator, and a Transport Control Protocol/Internet Protocol (TCP/IP) accelerator. The adaptation module may provide a translated sockets call from an application program to one of the DTIs, where an included set of memory structures may couple the translated sockets call to the DTI accelerator, which may in turn couple the set of memory structures to the TCP/IP accelerator. An article may include data causing a machine to perform a method including: receiving an application program sockets call at the adaptation module, deriving a translated sockets call from the application program sockets call, receiving the translated sockets call at a DTI, coupling the translated sockets call to a DTI accelerator using a set of memory structures in the DTI, and coupling the set of memory structures to a TCP/IP accelerator.
    Type: Grant
    Filed: November 27, 2002
    Date of Patent: December 4, 2007
    Assignee: Intel Corporation
    Inventors: Gary L. McAlpine, David B. Minturn, Hemal V. Shah, Annie Foong, Greg J. Regnier, Vikram A. Saletore
  • Patent number: 7120711
    Abstract: A system having an I/O interconnect topology utilizes internal packetized communications. The system includes a host system element, a plurality of switching elements, and a root complex to bridge communications between the host system and the switching elements. The ports of at least some of the switching elements have a cross-link device associated therewith, which is a logical device defined by configuration space of the switching element. Each cross-link device defines a cross-link communication path between two switching elements of the hierarchy allowing communications between peripherals to bypass the host.
    Type: Grant
    Filed: December 19, 2002
    Date of Patent: October 10, 2006
    Assignee: Intel Corporation
    Inventors: Joseph Schaefer, David B. Minturn, Prashant Sethi
  • Publication number: 20040123014
    Abstract: A system having an I/O interconnect topology utilizes internal packetized communications. The system includes a host system element, a plurality of switching elements, and a root complex to bridge communications between the host system and the switching elements. The ports of at least some of the switching elements have a cross-link device associated therewith, which is a logical device defined by configuration space of the switching element. Each cross-link device defines a cross-link communication path between two switching elements of the hierarchy allowing communications between peripherals to bypass the host.
    Type: Application
    Filed: December 19, 2002
    Publication date: June 24, 2004
    Applicant: Intel Corporation
    Inventors: Joseph Schaefer, David B. Minturn, Prashant Sethi
  • Publication number: 20040103225
    Abstract: An apparatus and a system may include an adaptation module, a plurality of Direct Transport Interfaces (DTIs), a DTI accelerator, and a Transport Control Protocol/Internet Protocol (TCP/IP) accelerator. The adaptation module may provide a translated sockets call from an application program to one of the DTIs, where an included set of memory structures may couple the translated sockets call to the DTI accelerator, which may in turn couple the set of memory structures to the TCP/IP accelerator. An article may include data causing a machine to perform a method including: receiving an application program sockets call at the adaptation module, deriving a translated sockets call from the application program sockets call, receiving the translated sockets call at a DTI, coupling the translated sockets call to a DTI accelerator using a set of memory structures in the DTI, and coupling the set of memory structures to a TCP/IP accelerator.
    Type: Application
    Filed: November 27, 2002
    Publication date: May 27, 2004
    Applicant: Intel Corporation
    Inventors: Gary L. McAlpine, David B. Minturn, Hemal V. Shah, Annie Foong, Greg J. Regnier, Vikram A. Saletore
  • Publication number: 20030086421
    Abstract: A multiple-domain processing system includes a multi-dimensional switching fabric to provide intra-domain and inter-domain communication within the system.
    Type: Application
    Filed: November 2, 2001
    Publication date: May 8, 2003
    Inventors: Oleg Awsienko, Edward Butler, Gary L. McAlpine, David B. Minturn, Joseph Schaefer, Gary A. Solomon