Patents by Inventor David B. Noble

David B. Noble has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6450116
    Abstract: An apparatus and method for exposing a substrate to plasma including a first reaction chamber adapted to generate a plasma comprising ions and radicals and a second reaction chamber coupled to the first reaction chamber and adapted to house a substrate at a sight in the second reaction chamber. The second reaction chamber is coupled to the first reaction chamber by an inlet member and radicals of the plasma flow through the inlet member into the second reaction chamber.
    Type: Grant
    Filed: November 12, 1999
    Date of Patent: September 17, 2002
    Assignee: Applied Materials, Inc.
    Inventors: David B. Noble, Ravi Jallepally, Nathan D'Astici, Gary Miner, Turgut Sahin, Guangcai Xing, Yashraj Bhatnagar
  • Publication number: 20020073925
    Abstract: An apparatus and method for exposing a substrate to plasma including a first reaction chamber adapted to generate a plasma comprising ions and radicals and a second reaction chamber coupled to the first reaction chamber and adapted to house a substrate at a sight in the second reaction chamber. The second reaction chamber is coupled to the first reaction chamber by an inlet member and radicals of the plasma flow through the inlet member into the second reaction chamber.
    Type: Application
    Filed: November 12, 1999
    Publication date: June 20, 2002
    Inventors: DAVID B. NOBLE, RAVI JALLEPALLY, NATHAN D'ASTICI, GARY MINER, TURGUT SAHIN, GUANGCAI XING, YASHRAJ BHATNAGAR
  • Patent number: 5256550
    Abstract: The present invention comprises a method of fabricating devices and circuits employing at least one heteroepitaxial layer under strain. The thickness of the heteroepitaxial layer is more than two times the calculated equilibrium critical thickness for an uncapped heteroepitaxial layer upon a crystalline substrate, based on previously known equilibrium theory for the uncapped layer. Subsequent to growth of the heteroepitaxial layer, the structure is processed at temperatures higher than the growth temperature of the heteroepitaxial layer.The strained heteroepitaxial layer (second layer) is epitaxially grown upon the surface of a first, underlaying crystalline layer, creating a heterojunction. Subsequently a third crystalline layer is deposited or grown upon the major exposed surface of the second, strained heteroepitaxial layer. The preferred manner of growth of the third crystalline layer is epitaxial growth.
    Type: Grant
    Filed: June 12, 1991
    Date of Patent: October 26, 1993
    Assignee: Hewlett-Packard Company
    Inventors: Stephen Laderman, Martin Scott, Theodore I. Kamins, Judy L. Hoyt, Clifford A. King, James F. Gibbons, David B. Noble
  • Patent number: 5202284
    Abstract: Several methods are disclosed for minimizing the number of defects or misfit locations in a SiGe layer selectively or non-selectively deposited on a partially oxide masked Si substrate.
    Type: Grant
    Filed: December 1, 1989
    Date of Patent: April 13, 1993
    Assignee: Hewlett-Packard Company
    Inventors: Theodore I. Kamins, David B. Noble, Judy L. Hoyt, James F. Gibbons, Martin P. Scott
  • Patent number: 5084411
    Abstract: Improved devices with silicon to SiGe alloy heterojunctions are provided for in accordance with the following discoveries. X-ray topography and transmission electron microscopy were used to quantify misfit-dislocation spacings in as-grown Si.sub.1-x Ge.sub.x films formed by Limited Reaction Processing (LRP), which is a chemical vapor deposition technique. These analysis techniques were also used to study dislocation formation during annealing of material grown by both LRP and by molecular beam epitaxy (MBE). The thickness at which misfit dislocations first appear in as-grown material was similar for both growth techniques. The thermal stability of capped and uncapped films was also investigated after rapid thermal annealing in the range of 625.degree. to 1000.degree. C. Significantly fewer misfit dislocations were observed in samples containing an epitaxial silicon cap.
    Type: Grant
    Filed: November 29, 1988
    Date of Patent: January 28, 1992
    Assignee: Hewlett-Packard Company
    Inventors: Stephen Laderman, Martin Scott, Theodore I. Kamins, Judy L. Hoyt, Clifford A. King, James F. Gibbons, David B. Noble