Abstract: An apparatus and method for preventing information leakage attacks through a polarized cryptographic bus architecture. The polarized cryptographic bus architecture randomly changes the polarity of the target bit such that the leaked information cannot be consistently averaged to yield statistical key material. Further, to increase the prevention of information leakage attacks, a set of dual rails is used to write data to a given register bit.

Abstract: An apparatus and method for preventing information leakage attacks that utilize timeline alignment. The apparatus and method inserts a random number of instructions into an encryption algorithm such that the leaked information can not be aligned in time to allow an attacker to break the encryption.

Abstract: An apparatus and method for preventing information leakage attacks that utilize timeline alignment. The apparatus and method inserts a random number of instructions into an encryption algorithm such that the leaked information can not be aligned in time to allow an attacker to break the encryption.

Abstract: An apparatus and method for preventing information leakage attacks that utilize timeline alignment. The apparatus and method inserts a random number of instructions into an encryption algorithm such that the leaked information can not be aligned in time to allow an attacker to break the encryption.

Abstract: An apparatus and method for preventing information leakage attacks that utilize timeline alignment. The apparatus and method inserts a random number of instructions into an encryption algorithm such that the leaked information can not be aligned in time to allow an attacker to break the encryption.

Abstract: Separating mixed signals includes receiving the mixed signals from signal sources transmitting from a number of cells. A signal source is operable to transmit a source signal, and a mixed signal comprises at least a subset of the source signals. A complex mixing matrix is established from the mixed signals. The complex mixing matrix describes mixing the source signals to yield the mixed signals. The number of cells is estimated from the mixed signals. The mixed signals are separated using the complex mixing matrix and the estimated number of cells.

Abstract: The present invention describes a new QR enclosing voting scheme that allows the extraction of base signatures of objects using a shortest path QR algorithm, providing a probability distribution measuring the occurrence of each random projection base of the object under consideration. The method is very effective in extracting the overall base signatures of a given class of objects. The novelty of this approach is that it is not tailored to the nature of the objects, thus generally applicable, and unmanned. Random projections (RP) have been a powerful tool to reduce the dimensionality of an object while preserving class separation. The inventive voting scheme, after RP, further reduces the dimensionality to no more than the number of the training objects.

Abstract: A method of separating mixed wireless signals is provided. The method includes receiving, at an antenna comprising a first quantity of antenna elements, mixed signals comprising a mixture of source signals communicated from a second quantity of wireless signal sources, and separating the mixed signals to estimate the source signals. The second quantity is greater than the first quantity, and the source signals communicated from at least one of the wireless signal sources are received at the antenna as complex signals.

Abstract: A method for classification of a target object having a periphery comprises the steps of: selecting a plurality of random first chords D1 across the periphery of the target object; measuring each of the first chords D1 to obtain a plurality of first dimensions; computing for each of the first chords D1 a second chord D2 across the periphery thus forming a plurality of D1, D2 pairs of chords; measuring the second chords D2 for all pairs to obtain second dimensions; computing for each of the pairs of first chords D1 and second chords D2 the ratio D1/D2 of the first dimension to the second dimension to obtain a plurality of first values; computing the logarithm of the first values to obtain a plurality of logarithmic values; computing difference values by subtracting the second dimension from the first dimension for each of the pairs; recording the first values, logarithmic values and difference values in histograms; extracting a vertex lists from the histograms; combining one or more of the vertex lists to o

Abstract: In a SIMD architecture having a two dimensional array of processing elements, where a controller broadcasts instructions to all processing elements in the array, a dynamically reconfigurable switching means useful to connect four of the processing elements in the array into a group in accordance with either the broadcast instruction of the controller or a special communication instruction held in one processing element of the group, the switch includes at least one dataline connected to each processing element in the group. A multiplexer is connected to each data line and to the controller and to a configuration register. It is adapted to load the special communication instruction from the one processing element in the group into a configuration register and to operate in accord with either the broadcast instruction from the controller or the contents of the configuration register to select one of the four data lines as a source of data and applying the data therefrom to a source output port.

Abstract: A system and method for transmitting a video object used in generating a plurality of frames of a video sequence over a limited bandwidth channel to reduce latency associated therewith includes separating the video object into a plurality of segments each having a size based in part on the limited bandwidth of the channel, identifying and transmitting at least one of the segments necessary for generation of an initial frame of the video sequence, and generating and displaying one or more of the initial frames based on the segment. The system and method may also intentionally reduce resolution of one or more segments to meet timing requirements association with generation and display of the at least one frame of a video sequence. In this situation, a residual representation of the segment is transmitted when bandwidth is available to improve resolution and quality of the originally transmitted segment and object resulting therefrom.

Abstract: A wide memory architecture is provided for storing data associated with a vector processor. Additionally, a method for accessing a wide memory architecture is provided. The wide memory architecture includes a memory for storing an array of vector operands. The memory is coupled to a data bus which provides an access pathway connecting the memory to a processor. The wide memory architecture further includes at least one staging buffer disposed between the memory and the processor. The staging buffer is capable of providing intermediate storage of a vector operand upon which a function can be performed by the processor.

Abstract: A method of compressing symbolic information stored in a two dimensional matrix of processing elements each containing a binary pixel representing an object mask and an associated multiple-bit valued pixel carrying information related to the object at each of the binary pixels and representative of objects embedded therein. A gated connection network of Processing Elements is formed for each object in the array by comparing the value of the binary pixels stored in each Processing Element with the value of the binary pixels stored in its neighboring Processing elements and closing the gates between Processing Elements that contain the same pixel value and opening the gates between Processing Elements that contain different pixel values.

Abstract: A computer architecture 10 for performing iconic and symbolic operations on image data is disclosed. Three levels of processing elements (CAAPP, ICP, GPPA) are disclosed. The processing elements in the lowest level (CAAPP) are provided with a plurality of controllable gates (N, S, E, W, H, V, NW, NE) that are used to selectively connect together processing elements in that level. In such manner, certain algorithms such as the minimum spanning tree algorithm can be efficiently performed.

Abstract: A computer architecture is disclosed for analyzing automatic image understanding problems. The architecture is designed so that it can efficiently perform a wide spectrum of tasks ranging from low level or iconic processing to high level or symbolic processing tasks. A first level (12) of image processing elements is provided for operating on the image matrix on a pixel per processing element basis. A second level (14) of processing elements is provided for operating on a plurality of pixels associated with a given array of first level processing elements. A third level (16) of processing elements is designed to instruct the first and second level processing elements, as well as for operating on a larger segment of the matrix. A host computer (18) is provided that directly communicates with at least each third level processing element. A high degree of parallelism is provided so that information can be readily transferred within the architecture at high speeds.

Abstract: Processing elements (PE1, PE2, etc.) in an image understanding machine are provided with gated connections (GN1, GS1, etc.) between each processing element and its neighbors. The image is loaded into the machine so that each pixel is stored in the memory 302 of each processing element. Unique labels are applied to each processing element in each segmented region (R1, R2) by using a series of some/none tests taking advantage of the gated connections between the processing element of each region. In such manner, higher level processing of the image can be performed.