Patents by Inventor David B. Slater, Jr.
David B. Slater, Jr. has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20120164765Abstract: A method of forming an ohmic contact for a semiconductor device can be provided by thinning a substrate to provide a reduced thickness substrate and providing a metal on the reduced thickness substrate. Laser annealing can be performed at a location of the metal and the reduced thickness substrate at an energy level to form a metal-substrate material to provide the ohmic contact thereat.Type: ApplicationFiled: March 12, 2012Publication date: June 28, 2012Inventors: David B. Slater, JR., John Edmond, Matthew Donofrio
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Publication number: 20120153343Abstract: A light emitting device includes a p-type semiconductor layer, an n-type semiconductor layer, and an active region between the n-type semiconductor layer and the p-type semiconductor layer. A non-transparent feature, such as a wire bond pad, is on the p-type semiconductor layer or on the n-type semiconductor layer opposite the p-type semiconductor layer, and a reduced conductivity region is in the p-type semiconductor layer or the n-type semiconductor layer and is aligned with the non-transparent feature. The reduced conductivity region may extend from a surface of the p-type semiconductor layer opposite the n-type semiconductor layer towards the active region and/or from a surface of the n-type semiconductor layer opposite the p-type semiconductor layer towards the active region.Type: ApplicationFiled: February 27, 2012Publication date: June 21, 2012Inventors: David Todd Emerson, Kevin Haberern, Michael John Bergmann, David B. Slater, JR., Matthew Donofrio, John Edmond
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Patent number: 8163577Abstract: A light emitting device includes a p-type semiconductor layer, an n-type semiconductor layer, and an active region between the n-type semiconductor layer and the p-type semiconductor layer. A non-transparent feature, such as a wire bond pad, is on the p-type semiconductor layer or on the n-type semiconductor layer opposite the p-type semiconductor layer, and a reduced conductivity region is in the p-type semiconductor layer or the n-type semiconductor layer and is aligned with the non-transparent feature. The reduced conductivity region may extend from a surface of the p-type semiconductor layer opposite the n-type semiconductor layer towards the active region and/or from a surface of the n-type semiconductor layer opposite the p-type semiconductor layer towards the active region.Type: GrantFiled: September 10, 2010Date of Patent: April 24, 2012Assignee: Cree, Inc.Inventors: David Todd Emerson, Kevin Haberern, Michael John Bergmann, David B. Slater, Jr., Matthew Donofrio, John Edmond
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Patent number: 8101961Abstract: A light emitting diode is disclosed that includes a growth substrate, a substantially transparent ohmic contact on a first surface of the growth substrate, a Group III nitride, light-emitting active region on a second surface of the growth substrate, a p-type Group III nitride contact layer on the active region that transmits light generated in the active region, and a substantially transparent ohmic contact on the p-type contact layer.Type: GrantFiled: April 20, 2007Date of Patent: January 24, 2012Assignee: Cree, Inc.Inventors: John A. Edmond, David B. Slater, Jr., Michael J. Bergmann
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Publication number: 20110180839Abstract: A light emitting diode structure is disclosed that includes a light emitting active portion formed of epitaxial layers and carrier substrate supporting the active portion. A bonding metal system that predominates in nickel and tin joins the active portion to the carrier substrate. At least one titanium adhesion layer is between the active portion and the carrier substrate and a platinum barrier layer is between the nickel-tin bonding system and the titanium adhesion layer. The platinum layer has a thickness sufficient to substantially prevent tin in the nickel tin bonding system from migrating into or through the titanium adhesion layer.Type: ApplicationFiled: February 25, 2011Publication date: July 28, 2011Inventors: Matthew Donofrio, David B. Slater, JR., John A. Edmond, Hua-Shuang Kong
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Patent number: 7943954Abstract: A semiconductor light emitting diode includes a semiconductor substrate, an epitaxial layer of n-type Group III nitride on the substrate, a p-type epitaxial layer of Group III nitride on the n-type epitaxial layer and forming a p-n junction with the n-type layer, and a resistive gallium nitride region on the n-type epitaxial layer and adjacent the p-type epitaxial layer for electrically isolating portions of the p-n junction. A metal contact layer is formed on the p-type epitaxial layer. In method embodiments disclosed, the resistive gallium nitride border is formed by forming an implant mask on the p-type epitaxial region and implanting ions into portions of the p-type epitaxial region to render portions of the p-type epitaxial region semi-insulating. A photoresist mask or a sufficiently thick metal layer may be used as the implant mask.Type: GrantFiled: July 22, 2009Date of Patent: May 17, 2011Assignee: Cree, Inc.Inventors: Yifeng Wu, Gerald H. Negley, David B. Slater, Jr., Valeri F. Tsvetkov, Alexander Suvorov
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Patent number: 7910945Abstract: A light emitting diode structure is disclosed that includes a light emitting active portion formed of epitaxial layers and carrier substrate supporting the active portion. A bonding metal system that predominates in nickel and tin joins the active portion to the carrier substrate. At least one titanium adhesion layer is between the active portion and the carrier substrate and a platinum barrier layer is between the nickel-tin bonding system and the titanium adhesion layer. The platinum layer has a thickness sufficient to substantially prevent tin in the nickel tin bonding system from migrating into or through the titanium adhesion layer.Type: GrantFiled: August 23, 2007Date of Patent: March 22, 2011Assignee: Cree, Inc.Inventors: Matthew Donofrio, David B. Slater, Jr., John A. Edmond, Hua-Shuang Kong
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Publication number: 20110008922Abstract: A light emitting device includes a p-type semiconductor layer, an n-type semiconductor layer, and an active region between the n-type semiconductor layer and the p-type semiconductor layer. A non-transparent feature, such as a wire bond pad, is on the p-type semiconductor layer or on the n-type semiconductor layer opposite the p-type semiconductor layer, and a reduced conductivity region is in the p-type semiconductor layer or the n-type semiconductor layer and is aligned with the non-transparent feature. The reduced conductivity region may extend from a surface of the p-type semiconductor layer opposite the n-type semiconductor layer towards the active region and/or from a surface of the n-type semiconductor layer opposite the p-type semiconductor layer towards the active region.Type: ApplicationFiled: September 10, 2010Publication date: January 13, 2011Inventors: David Todd Emerson, Kevin Haberern, Michael John Bergmann, David B. Slater, JR., Matthew Donofrio, John Edmond
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Patent number: 7855459Abstract: A semiconductor structure and a bonding method are disclosed that includes a device wafer, a substrate wafer, and a metal bonding system between the device wafer and the substrate wafer. The metal bonding system includes gold, tin, and nickel, and includes at least one discrete layer of gold and tin that is at least about 88 percent gold by weight.Type: GrantFiled: September 22, 2006Date of Patent: December 21, 2010Assignee: Cree, Inc.Inventors: David B. Slater, Jr., John A. Edmond, Hua-Shuang Kong
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Publication number: 20100283077Abstract: Light emitting diodes include a diode region comprising a gallium nitride-based n-type layer, an active region and a gallium nitride-based p-type layer. A substrate is provided on the gallium nitride-based n-type layer and optically matched to the diode region. The substrate has a first face remote from the gallium nitride-based n-type layer, a second face adjacent the gallium nitride-based n-type layer and a sidewall therebetween. At least a portion of the sidewall is beveled, so as to extend oblique to the first and second faces. A reflector may be provided on the gallium nitride-based p-type layer opposite the substrate. Moreover, the diode region may be wider than the second face of the substrate and may include a mesa remote from the first face that is narrower than the first face and the second face.Type: ApplicationFiled: July 13, 2010Publication date: November 11, 2010Inventors: David B. Slater, JR., Robert C. Glass, Charles M. Swoboda, Bernd Keller, James Ibbetson, Brian Thibeault, Eric J. Tarsa
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Publication number: 20100276700Abstract: A light emitting diode is disclosed that includes a support structure and a Group III nitride light emitting active structure mesa on the support structure. The mesa has its sidewalls along an indexed crystal plane of the Group III nitride. A method of forming the diode is also disclosed that includes the steps of removing a substrate from a Group III nitride light emitting structure that includes a sub-mount structure on the Group III nitride light emitting structure opposite the substrate, and thereafter etching the surface of the Group III nitride from which the substrate has been removed with an anisotropic etch to develop crystal facets on the surface in which the facets are along an index plane of the Group III nitride. The method can also include etching the light emitting structure with an anisotropic etch to form a mesa with edges along an index plane of the Group III nitride.Type: ApplicationFiled: July 12, 2010Publication date: November 4, 2010Inventors: JOHN A. EDMOND, David B. Slater, JR., Hua Shuang Kong, Matthew Donofrio
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Patent number: 7795623Abstract: A light emitting device includes a p-type semiconductor layer, an n-type semiconductor layer, and an active region between the n-type semiconductor layer and the p-type semiconductor layer. A non-transparent feature, such as a wire bond pad, is on the p-type semiconductor layer or on the n-type semiconductor layer opposite the p-type semiconductor layer, and a reduced conductivity region is in the p-type semiconductor layer or the n-type semiconductor layer and is aligned with the non-transparent feature. The reduced conductivity region may extend from a surface of the p-type semiconductor layer opposite the n-type semiconductor layer towards the active region and/or from a surface of the n-type semiconductor layer opposite the p-type semiconductor layer towards the active region.Type: GrantFiled: March 8, 2007Date of Patent: September 14, 2010Assignee: Cree, Inc.Inventors: David Todd Emerson, Kevin Haberern, Michael John Bergmann, David B. Slater, Jr., Matthew Donofrio, John Edmond
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Patent number: 7791061Abstract: A light emitting diode is disclosed that includes a support structure and a Group III nitride light emitting active structure mesa on the support structure. The mesa has its sidewalls along an indexed crystal plane of the Group III nitride. A method of forming the diode is also disclosed that includes the steps of removing a substrate from a Group III nitride light emitting structure that includes a sub-mount structure on the Group III nitride light emitting structure opposite the substrate, and thereafter etching the surface of the Group III nitride from which the substrate has been removed with an anisotropic etch to develop crystal facets on the surface in which the facets are along an index plane of the Group III nitride. The method can also include etching the light emitting structure with an anisotropic etch to form a mesa with edges along an index plane of the Group III nitride.Type: GrantFiled: January 30, 2006Date of Patent: September 7, 2010Assignee: Cree, Inc.Inventors: John A. Edmond, David B. Slater, Jr., Hua Shuang Kong, Matthew Donofrio
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Publication number: 20100006883Abstract: Semiconductor light emitting devices, such as light emitting diodes, include a substrate, an epitaxial region on the substrate that includes a light emitting region such as a light emitting diode region, and a multilayer conductive stack including a reflector layer, on the epitaxial region. A barrier layer is provided on the reflector layer and extending on a sidewall of the reflector layer. The multilayer conductive stack can also include an ohmic layer between the reflector and the epitaxial region. The barrier layer further extends on a sidewall of the ohmic layer. The barrier layer can also extend onto the epitaxial region outside the multilayer conductive stack. The barrier layer can be fabricated as a series of alternating first and second sublayers.Type: ApplicationFiled: September 22, 2009Publication date: January 14, 2010Inventors: David B. Slater, JR., Bradley E. Williams, Peter S. Andrews, John A. Edmond, Scott T. Allen
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Patent number: 7638013Abstract: A component assembly system is provided that includes a longitudinally elongated tape carrier, a longitudinally elongated submount carrier, and an assembly machine. A plurality of components may be attached to the tape carrier. The assembly machine is adapted to receiving the tape carrier, with the components attached thereto, and to receive the submount carrier. The assembly machine is further adapted to bring the tape carrier in close proximity to the submount carrier, and to attach the components to the submounts on the submount carrier.Type: GrantFiled: October 24, 2006Date of Patent: December 29, 2009Assignee: Cree, Inc.Inventors: Norbert Hiller, Peter S. Andrews, David B. Slater, Jr., Gerald H. Negley
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Patent number: 7638811Abstract: An optoelectronic device includes a passivation layer of a dielectric material having a graded composition that varies with depth, whether continuous or stepwise, to provide a first index of refraction proximate to a semiconductor or conductor material and provide a second index of refraction adjacent to a surrounding material, such as an encapsulant. The resulting graded dielectric layer reduces Fresnel losses by reducing index of refraction mismatches between the adjacent semiconductor or conductor layer and the surrounding medium. Methods for forming graded dielectric layers include supplying a nitrogen-containing source gas at a declining flow rate or concentration, while supplying an oxygen-containing source gas an rising flow rate or concentration, to a deposition chamber.Type: GrantFiled: March 13, 2007Date of Patent: December 29, 2009Assignee: Cree, Inc.Inventor: David B. Slater, Jr.
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Publication number: 20090309124Abstract: A semiconductor light emitting diode includes a semiconductor substrate, an epitaxial layer of n-type Group III nitride on the substrate, a p-type epitaxial layer of Group III nitride on the n-type epitaxial layer and forming a p-n junction with the n-type layer, and a resistive gallium nitride region on the n-type epitaxial layer and adjacent the p-type epitaxial layer for electrically isolating portions of the p-n junction. A metal contact layer is formed on the p-type epitaxial layer. In method embodiments disclosed, the resistive gallium nitride border is formed by forming an implant mask on the p-type epitaxial region and implanting ions into portions of the p-type epitaxial region to render portions of the p-type epitaxial region semi-insulating. A photoresist mask or a sufficiently thick metal layer may be used as the implant mask.Type: ApplicationFiled: July 22, 2009Publication date: December 17, 2009Applicant: CREE, INC.Inventors: Yifeng Wu, Gerald H. Negley, David B. Slater, JR., Valeri F. Tsvetkov, Alexander Suvorov
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Patent number: 7611915Abstract: Semiconductor light emitting devices, such as light emitting diodes, include a substrate, an epitaxial region on the substrate that includes a light emitting region such as a light emitting diode region, and a multilayer conductive stack including a reflector layer, on the epitaxial region. A barrier layer is provided on the reflector layer and extending on a sidewall of the reflector layer. The multilayer conductive stack can also include an ohmic layer between the reflector and the epitaxial region. The barrier layer further extends on a sidewall of the ohmic layer. The barrier layer can also extend onto the epitaxial region outside the multilayer conductive stack. The barrier layer can be fabricated as a series of alternating first and second sublayers.Type: GrantFiled: March 20, 2007Date of Patent: November 3, 2009Assignee: Cree, Inc.Inventors: David B. Slater, Jr., Bradley E. Williams, Peter S. Andrews, John A. Edmond, Scott T. Allen
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Patent number: 7608860Abstract: Light emitting device die having a mesa configuration on a substrate and an electrode on the mesa are attached to a submount in a flip-chip configuration by forming predefined pattern of conductive die attach material on at least one of the electrode and the submount and mounting the light emitting device die to the submount. The predefined pattern of conductive die attach material is selected so as to prevent the conductive die attach material from contacting regions of having opposite conductivity types when the light emitting device die is mounted to the submount. The predefined pattern of conductive die attach material may provide a volume of die attach material that is less than a volume defined by an area of the electrode and a distance between the electrode and the submount. Light emitting device dies having predefined patterns of conductive die attach material are also provided.Type: GrantFiled: July 2, 2007Date of Patent: October 27, 2009Assignees: Cree, Inc., Cree Microwave, LLCInventors: David B. Slater, Jr., Jayesh Bharathan, John Edmond, Mark Raffetto, Anwar Mohammed, Peter S. Andrews, Gerald H. Negley
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Patent number: RE42007Abstract: A vertical geometry light emitting diode is disclosed that is capable of emitting light in the red, green, blue, violet and ultraviolet portions of the electromagnetic spectrum. The light emitting diode includes a conductive silicon carbide substrate, an InGaN quantum well, a conductive buffer layer between the substrate and the quantum well, a respective undoped gallium nitride layer on each surface of the quantum well, and ohmic contacts in a vertical geometry orientation.Type: GrantFiled: April 24, 2008Date of Patent: December 28, 2010Assignee: Cree, Inc.Inventors: Kathleen Marie Doverspike, John Adam Edmond, Hua-shuang Kong, Heidi Marie Dieringer, David B. Slater, Jr.