Abstract: A system for adapting a transmission rate of an audio signal transmitted over a TDM communications link from a source to a destination includes a first variable-depth storage component and a first processor at the source, and a second variable-length storage component and a second processor at the destination. The first storage component stores the audio signal, and the first processor selectively withdraws the signal from the first storage component. The first processor encapsulates the signal into packets and transmits the packets via the TDM link. The second processor receives the packets, removes the audio signal, and deposits the signal into the second variable-depth storage component. The first processor selectively withdraws the audio signal as a function of the amount of data in the first storage component, and the second processor selectively withdraws the audio signal as a function of an amount of data in the second storage component.

Abstract: A system for adapting a transmission rate of an audio signal transmitted over a TDM communications link from a source to a destination includes a first variable-depth storage component and a first processor at the source, and a second variable-length storage component and a second processor at the destination. The first storage component stores the audio signal, and the first processor selectively withdraws the signal from the first storage component. The first processor encapsulates the signal into packets and transmits the packets via the TDM link. The second processor receives the packets, removes the audio signal, and deposits the signal into the second variable-depth storage component. The first processor selectively withdraws the audio signal as a function of the amount of data in the first storage component, and the second processor selectively withdraws the audio signal as a function of an amount of data in the second storage component.

Abstract: A dynamically variable digital delay line includes a storage element, write control circuitry, read control circuitry and output rate control circuitry. Generally, the invention applies a predetermined throughput delay to a series of digital data elements by entering each digital data element into a storage element for an amount of time equal to the desired throughput delay, then extracting each digital data element and returning it to the original data path. While operating with a constant predetermined delay, the invention extracts digital data elements from the storage element at the same rate as digital data elements are entered into the storage element. When a change to the throughput delay is required, the invention changes the digital data element extraction rate with respect to the digital data element entry rate until the desired throughput delay is achieved.

Abstract: System for establishing a TDM information protocol over a communications path includes a transmit section and a receive section. In general, the transmit element receives a succession of data elements from each of a plurality of independent channels and combines the data elements to form a single TDM sequence of data elements. The receive element receives a TDM sequence of data elements and separates the sequence into its constituent components to form a plurality of channels, each forming a succession of data elements. In one form of the invention, data elements transmitted via the TDM communications path are limited to a single time slot in the TDM protocol.

Abstract: A dynamically variable digital delay line includes a storage element, write control circuitry, read control circuitry and output rate control circuitry. Generally, the invention applies a predetermined throughput delay to a series of digital data elements by entering each digital data element into a storage element for an amount of time equal to the desired throughput delay, then extracting each digital data element and returning it to the original data path. While operating with a constant predetermined delay, the invention extracts digital data elements from the storage element at the same rate as digital data elements are entered into the storage element. When a change to the throughput delay is required, the invention changes the digital data element extraction rate with respect to the digital data element entry rate until the desired throughput delay is achieved.