Patents by Inventor David Baca

David Baca has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220005388
    Abstract: A foldable computing device can be configured to provide a user interface (UI) optimization that enables an application window to be presented in a predictable location when an application is launched, a UI optimization that enables an application window to be moved to an active display area, a UI optimization that enables a modal UI element to be presented in such a way that it does not overlap a seam on the device, a UI optimization that enables an image presented by the device to be adjusted to maintain a view of the focal point of the image across device posture or orientation changes, a UI optimization that enables the device to transition between UI modes optimized for front-facing and world-facing image capture, and/or a UI optimization that enables the device to provide a UI for instructing a user to flip the device when a biometric sensor is in use.
    Type: Application
    Filed: September 21, 2021
    Publication date: January 6, 2022
    Inventors: Christian KLEIN, Peter HAMMERQUIST, Ryan PENDLAY, Albert Peter YIH, Lauren EDELMEIER, Christoffer Peter Hart HANSEN, Diego David BACA DEL ROSARIO
  • Publication number: 20220005387
    Abstract: A foldable computing device can be configured to provide a user interface (UI) optimization that enables an application window to be presented in a predictable location when an application is launched, a UI optimization that enables an application window to be moved to an active display area, a UI optimization that enables a modal UI element to be presented in such a way that it does not overlap a seam on the device, a UI optimization that enables an image presented by the device to be adjusted to maintain a view of the focal point of the image across device posture or orientation changes, a UI optimization that enables the device to transition between UI modes optimized for front-facing and world-facing image capture, and/or a UI optimization that enables the device to provide a UI for instructing a user to flip the device when a biometric sensor is in use.
    Type: Application
    Filed: September 17, 2021
    Publication date: January 6, 2022
    Inventors: Christian KLEIN, Peter HAMMERQUIST, Ryan PENDLAY, Albert Peter YIH, Lauren EDELMEIER, Christoffer Peter Hart HANSEN, Diego David BACA DEL ROSARIO
  • Patent number: 11138912
    Abstract: A bendable computing device can operate in a single display region mode when the device is in an unbent posture and can operate in a multiple display region mode when the device is in a bent posture. The multiple display region mode subdivides the bendable screen of the bendable computing device into a first display region and a second display region. When operating in the multiple display region mode, the bendable computing device can display an artificial hardware seam between the first display region and the second display region. User input gestures originating at the artificial hardware seam or terminating at the artificial hardware seam can be utilized to provide various types of functionality. Various types of functionality can also be provided when the bendable computing device detects that it has transitioned from an unbent posture to a bent posture or from a bent posture to an unbent posture.
    Type: Grant
    Filed: December 23, 2019
    Date of Patent: October 5, 2021
    Assignee: MICROSOFT TECHNOLOGY LICENSING, LLC
    Inventors: Christian Klein, Peter Hammerquist, Ryan Pendlay, Albert Peter Yih, Lauren Edelmeier, Christoffer Peter Hart Hansen, Diego David Baca Del Rosario
  • Patent number: 11127321
    Abstract: A foldable computing device can be configured to provide a user interface (UI) optimization that enables an application window to be presented in a predictable location when an application is launched, a UI optimization that enables an application window to be moved to an active display area, a UI optimization that enables a modal UI element to be presented in such a way that it does not overlap a seam on the device, a UI optimization that enables an image presented by the device to be adjusted to maintain a view of the focal point of the image across device posture or orientation changes, a UI optimization that enables the device to transition between UI modes optimized for front-facing and world-facing image capture, and/or a UI optimization that enables the device to provide a UI for instructing a user to flip the device when a biometric sensor is in use.
    Type: Grant
    Filed: December 23, 2019
    Date of Patent: September 21, 2021
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Christian Klein, Peter Hammerquist, Ryan Pendlay, Albert Peter Yih, Lauren Edelmeier, Christoffer Peter Hart Hansen, Diego David Baca Del Rosario
  • Publication number: 20210097901
    Abstract: A bendable computing device can operate in a single display region mode when the device is in an unbent posture and can operate in a multiple display region mode when the device is in a bent posture. The multiple display region mode subdivides the bendable screen of the bendable computing device into a first display region and a second display region. When operating in the multiple display region mode, the bendable computing device can display an artificial hardware seam between the first display region and the second display region. User input gestures originating at the artificial hardware seam or terminating at the artificial hardware seam can be utilized to provide various types of functionality. Various types of functionality can also be provided when the bendable computing device detects that it has transitioned from an unbent posture to a bent posture or from a bent posture to an unbent posture.
    Type: Application
    Filed: December 23, 2019
    Publication date: April 1, 2021
    Inventors: Christian KLEIN, Peter HAMMERQUIST, Ryan PENDLAY, Albert Peter YIH, Lauren EDELMEIER, Christoffer Peter Hart HANSEN, Diego David BACA DEL ROSARIO
  • Publication number: 20210096675
    Abstract: A foldable computing device can be configured to provide a user interface (UI) optimization that enables an application window to be presented in a predictable location when an application is launched, a UI optimization that enables an application window to be moved to an active display area, a UI optimization that enables a modal UI element to be presented in such a way that it does not overlap a seam on the device, a UI optimization that enables an image presented by the device to be adjusted to maintain a view of the focal point of the image across device posture or orientation changes, a UI optimization that enables the device to transition between UI modes optimized for front-facing and world-facing image capture, and/or a UI optimization that enables the device to provide a UI for instructing a user to flip the device when a biometric sensor is in use.
    Type: Application
    Filed: December 23, 2019
    Publication date: April 1, 2021
    Inventors: Christian KLEIN, Peter HAMMERQUIST, Ryan PENDLAY, Albert Peter YIH, Lauren EDELMEIER, Christoffer Peter Hart HANSEN, Diego David BACA DEL ROSARIO
  • Patent number: 10831578
    Abstract: A processing system, such as for an automobile, includes multiple processor cores, including an application core and a safety core, and a fault detection circuit in communication with the processor cores. The fault detection circuit includes a progress register for storing progress data of an application executed on the application core. The safety core, which executes a fault detection program, reads the progress data from the progress register, and generates an output based on the progress data and an expected behavior of the application. The safety core writes the output to a status register of the fault detection circuit. The fault detection circuit includes a controller that reads the status register and generates a fault signal when the output indicates there is a fault in the execution of the application. In response, the application core either recovers from the fault or runs in a safe mode.
    Type: Grant
    Filed: September 28, 2018
    Date of Patent: November 10, 2020
    Assignee: NXP USA, INC.
    Inventors: Hemant Nautiyal, Jan Chochola, Ashish Kumar Gupta, David Baca
  • Publication number: 20200104204
    Abstract: A processing system, such as for an automobile, includes multiple processor cores, including an application core and a safety core, and a fault detection circuit in communication with the processor cores. The fault detection circuit includes a progress register for storing progress data of an application executed on the application core. The safety core, which executes a fault detection program, reads the progress data from the progress register, and generates an output based on the progress data and an expected behavior of the application. The safety core writes the output to a status register of the fault detection circuit. The fault detection circuit includes a controller that reads the status register and generates a fault signal when the output indicates there is a fault in the execution of the application. In response, the application core either recovers from the fault or runs in a safe mode.
    Type: Application
    Filed: September 28, 2018
    Publication date: April 2, 2020
    Inventors: Hemant Nautiyal, Jan Chochola, Ashish Kumar Gupta, David Baca
  • Patent number: 10459782
    Abstract: Counter based heartbeat messaging is implemented by storing heartbeat count vectors and health vectors of each core in a shared memory. Each core implements its heartbeat operation by storing the heartbeat count and health vectors from shared to local memory. A core uses its locally stored vectors to detect fault conditions at the other cores, and to achieve interactive consistency. Any core can initiate a system reaction to a core having a failing health status when a defined number of cores agree with that status.
    Type: Grant
    Filed: August 31, 2017
    Date of Patent: October 29, 2019
    Assignee: NXP USA, Inc.
    Inventor: David Baca
  • Patent number: 10445169
    Abstract: A method includes receiving a first progress request from a first state machine associated with execution of a first thread on a processor. The method includes updating a current state of a temporal relationship state machine based on the current state, the first progress request, and a predetermined temporal relationship between progress of the first state machine to a first state machine state and progress to a second state. The predetermined temporal relationship may require the first state machine to progress to the first state machine state before the progress to the second state. The current state of the temporal relationship state machine may be one of a first temporal relationship state and a second temporal relationship state. The second state may be a second state machine state of the first state machine. The second state may be a second state machine state of a second state machine.
    Type: Grant
    Filed: April 8, 2016
    Date of Patent: October 15, 2019
    Assignee: NXP USA, Inc.
    Inventor: David Baca
  • Publication number: 20190065296
    Abstract: Counter based heartbeat messaging is implemented by storing heartbeat count vectors and health vectors of each core in a shared memory. Each core implements its heartbeat operation by storing the heartbeat count and health vectors from shared to local memory. A core uses its locally stored vectors to detect fault conditions at the other cores, and to achieve interactive consistency. Any core can initiate a system reaction to a core having a failing health status when a defined number of cores agree with that status.
    Type: Application
    Filed: August 31, 2017
    Publication date: February 28, 2019
    Inventor: David Baca
  • Patent number: 9823983
    Abstract: An electronic fault detection unit is provided that has a first register, a second register, a comparator circuit, and a timer circuit. The first and second register can be written from a first software portion, and a second software portion, respectively. The comparator circuit is arranged to detect that both the first and second register have been written, verify a relationship between first data written to the first register and second data written to the second register, and signal a fault upon said verification failing. The timer circuit is arranged to signal a fault if said verification of the comparator circuit does not occur within a time limit.
    Type: Grant
    Filed: September 25, 2014
    Date of Patent: November 21, 2017
    Assignee: NXP USA, Inc.
    Inventor: David Baca
  • Publication number: 20170293516
    Abstract: A method includes receiving a first progress request from a first state machine associated with execution of a first thread on a processor. The method includes updating a current state of a temporal relationship state machine based on the current state, the first progress request, and a predetermined temporal relationship between progress of the first state machine to a first state machine state and progress to a second state. The predetermined temporal relationship may require the first state machine to progress to the first state machine state before the progress to the second state. The current state of the temporal relationship state machine may be one of a first temporal relationship state and a second temporal relationship state. The second state may be a second state machine state of the first state machine. The second state may be a second state machine state of a second state machine.
    Type: Application
    Filed: April 8, 2016
    Publication date: October 12, 2017
    Inventor: David BACA
  • Patent number: 9557906
    Abstract: Among other things, one or more techniques and/or systems are provided for maintaining an information bar associated with a visualization. The visualization may correspond to an interface configured to display one or more entities (e.g., a map interface may display location entities, such as coffee shops, and/or direction entities, such as portions of a route, within a map). Responsive to the visualization being populated, the information bar may be populated with one or more information panels corresponding to the one or more entities. For example, a first information panel may comprise coffee specials and hours of operation for a first coffee shop entity populated within the visualization. Responsive to a selection of an entity within the visualization, a corresponding information panel may (automatically) be scrolled to and/or highlighted within the information bar. In this way, the information bar may display information panels corresponding to entities of the visualization.
    Type: Grant
    Filed: February 21, 2012
    Date of Patent: January 31, 2017
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Vincent Joseph Pasceri, Diego David Baca Del Rosario, Wolf Lochland Logan
  • Patent number: 9477577
    Abstract: A method of enabling an executed control flow path through computer program code to be determined. The method comprising modelling cumulative instruction counts for control flow paths through the computer program code, and inserting at least one probe within the computer program code to enable a cumulative instruction count value for at least one control flow path of the computer program code to be accessed.
    Type: Grant
    Filed: July 20, 2011
    Date of Patent: October 25, 2016
    Assignee: Freescale Semiconductor, Inc.
    Inventor: David Baca
  • Publication number: 20160092320
    Abstract: An electronic fault detection unit is provided that has a first register, a second register, a comparator circuit, and a timer circuit. The first and second register can be written from a first software portion, and a second software portion, respectively. The comparator circuit is arranged to detect that both the first and second register have been written, verify a relationship between first data written to the first register and second data written to the second register, and signal a fault upon said verification failing. The timer circuit is arranged to signal a fault if said verification of the comparator circuit does not occur within a time limit.
    Type: Application
    Filed: September 25, 2014
    Publication date: March 31, 2016
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventor: DAVID BACA
  • Patent number: 9223460
    Abstract: Embodiments of the present invention relate to systems, methods, and computer-storage media for organizing presentation of browser toolbars. In one embodiment, a toolbar of a web browser is presented. The toolbar has a search input box. Additionally, one or more application icons are presented on each of at least two sides of the search input box. An indication that a user has engaged an application icon of the toolbar is received. Further, an application window is presented beneath the search input box of the toolbar. The application window comprises content associated with the application icon.
    Type: Grant
    Filed: December 17, 2010
    Date of Patent: December 29, 2015
    Assignee: Microsoft Corporation
    Inventors: Felipe Luis Naranjo, Nathan Deepak Jhaveri, Diego David Baca Del Rosario, Paul Ronald Ray
  • Patent number: 8762960
    Abstract: A method of developing a tracing solution for the execution of blocks of computer code. The method comprises representing each block of code of an initial tracing solution as a vertex on an initial tracing solution graph. The vertices on the initial tracing solution graph constitute an initial set of vertices. The method further comprises checking whether there are any redundant vertices in the initial set of vertices. Redundant vertices are vertices not needed for a tracing solution. If there are any redundant vertices in the initial set of vertices, one or more of the redundant vertices is eliminated from the initial set of vertices, thereby deriving a reduced set of vertices.
    Type: Grant
    Filed: September 30, 2009
    Date of Patent: June 24, 2014
    Assignee: Freescale Semiconductor, Inc.
    Inventor: David Baca
  • Publication number: 20140157240
    Abstract: A method of enabling an executed control flow path through computer program code to be determined. The method comprising modelling cumulative instruction counts for control flow paths through the computer program code, and inserting at least one probe within the computer program code to enable a cumulative instruction count value for at least one control flow path of the computer program code to be accessed.
    Type: Application
    Filed: July 20, 2011
    Publication date: June 5, 2014
    Applicant: Freescale Semiconductor, Inc
    Inventor: David Baca
  • Publication number: 20130215155
    Abstract: Among other things, one or more techniques and/or systems are provided for maintaining an information bar associated with a visualization. The visualization may correspond to an interface configured to display one or more entities (e.g., a map interface may display location entities, such as coffee shops, and/or direction entities, such as portions of a route, within a map). Responsive to the visualization being populated, the information bar may be populated with one or more information panels corresponding to the one or more entities. For example, a first information panel may comprise coffee specials and hours of operation for a first coffee shop entity populated within the visualization. Responsive to a selection of an entity within the visualization, a corresponding information panel may (automatically) be scrolled to and/or highlighted within the information bar. In this way, the information bar may display information panels corresponding to entities of the visualization.
    Type: Application
    Filed: February 21, 2012
    Publication date: August 22, 2013
    Applicant: Microsoft Corporation
    Inventors: Vincent Joseph Pasceri, Diego David Baca Del Rosario, Wolf Lochland Logan