Abstract: A voltage domain transition buffer is presented for transitioning an input data signal from a first voltage domain to a second voltage domain. The buffer includes a first CMOS inverter followed by a second CMOS inverter. The input to the first CMOS inverter is connected to a buffer input and the output connected to the input of the second CMOS inverter at an intermediate node. The output of the second CMOS inverter is connected to a buffer output and also to the gate of a feedback pull-up PFET that is connected in source-drain relationship between the voltage source of the second voltage domain and the intermediate node. A resistive device such as a resistor or NFET is connected between the voltage source of the second voltage domain and the source of the first CMOS inverter. The design of the voltage domain transition buffer eliminates or significantly mitigates leakage current during a non-transitioning state.

Abstract: In one disclosed method, a dynamic signal is driven onto a driven end of a first signal line, and an ungrounded bias signal is driven onto a driven end of a second signal line. The ungrounded bias signal is then received at a receiving end of the second signal line, and the dynamic signal is received at a receiving end of the first signal line. The receiving end of the second signal line is coupled to a first input of a quasi-differential receiver, and the receiving end of the first signal line is coupled to a second input of the receiver. The ungrounded bias signal is used to bias a toggle point of the receiver, and the dynamic signal is used to toggle an output of the receiver. Variations of this method, and apparatus that can perform this and other methods, are also disclosed.

Abstract: Under control of an input signal, a signal line is driven toward a first voltage by coupling a first current path to the signal line. While the first current path is coupled to the signal line, 1) a charge boost is provided to the signal line to increase the rate at which a voltage on the signal line switches toward the first voltage, and 2) current flow through the signal line is clamped to prevent a voltage on the signal line from reaching the first voltage. The current flow may be clamped by means of a resistor in the first current path, and the charge boost may be provided by a capacitor that is coupled in parallel with the resistor.