Patents by Inventor David Barach

David Barach has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Accelerated data switching on symmetric multiprocessor systems using port affinity
    Patent number: 7840731
    Abstract: A router that includes a plurality of processors (SMPs) where there is “affinity” between particular processors and particular interfaces: Each of the router's interfaces are assigned to one of the processors. A packet arriving at a particular interface will be handled by the processor having an affinity to that particular interface. If the packet's egress is on an interface assigned to the same processor, then the output process will also be handled by that processor. If the egress interface has an affinity to a different processor, then the packet is handed over to the other processor for egress. The data structures that must be retrieved from memory to handle a packet are often associated with the interfaces through which the packet passes.
    Type: Grant
    Filed: August 25, 2004
    Date of Patent: November 23, 2010
    Assignee: Cisco Technology, Inc.
    Inventors: Pradeep Kathail, Kirk Lougheed, David Barach, Philip Winterfield
  • Accelerated data switching on symmetric multiprocessor systems using port affinity
    Publication number: 20060045078
    Abstract: A router that includes a plurality of processors (SMPs) where there is “affinity” between particular processors and particular interfaces: Each of the router's interfaces are assigned to one of the processors. A packet arriving at a particular interface will be handled by the processor having an affinity to that particular interface. If the packet's egress is on an interface assigned to the same processor, then the output process will also be handled by that processor. If the egress interface has an affinity to a different processor, then the packet is handed over to the other processor for egress. The data structures that must be retrieved from memory to handle a packet are often associated with the interfaces through which the packet passes.
    Type: Application
    Filed: August 25, 2004
    Publication date: March 2, 2006
    Inventors: Pradeep Kathail, Kirk Lougheed, David Barach, Philip Winterfield
  • Efficient method for collecting statistics via a half-duplex serial bus
    Patent number: 6973044
    Abstract: A system controller on a half-duplex communication bus architecture gathers statistical data from at least one line card. The line card automatically collects statistical data for the system controller in a controlled manner in an information buffer. Then, the line card reports a subset of the statistical data in the buffer to the system controller when polled either for the statistical data or for some other reason and the statistical data is selected to be reported. The line card reports the statistical data in place of reporting a null response in the preferred embodiment whenever possible.
    Type: Grant
    Filed: March 22, 2000
    Date of Patent: December 6, 2005
    Assignee: Cisco Technology, Inc.
    Inventor: David Barach